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Searched refs:DMAREQ_WTIMER1_CC0 (Results 1 – 5 of 5) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_dmareq.h91 #define DMAREQ_WTIMER1_CC0 ((27 << 16) + 1) /**< DMA channel select for WTIMER1_C… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_dmareq.h91 #define DMAREQ_WTIMER1_CC0 ((27 << 16) + 1) /**< DMA channel select for WTIMER1_C… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_dmareq.h91 #define DMAREQ_WTIMER1_CC0 ((27 << 16) + 1) /**< DMA channel select for WTIMER1_C… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_dmareq.h115 #define DMAREQ_WTIMER1_CC0 ((33 << 16) + 1) /**< DMA channel select for WTIMER1_CC0 */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_dmareq.h132 #define DMAREQ_WTIMER1_CC0 ((33 << 16) + 1) /**< DMA channel select for WTIMER1_CC0 */ macro