Home
last modified time | relevance | path

Searched refs:DMAREQ_UART0_RXDATAV (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dmareq.h89 #define DMAREQ_UART0_RXDATAV ((44 << 16) + 0) /**< DMA channel select for UART0_RXDATAV */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_dmareq.h77 #define DMAREQ_UART0_RXDATAV ((18 << 16) + 0) /**< DMA channel select for UART0_RXDATAV */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_dmareq.h80 #define DMAREQ_UART0_RXDATAV ((18 << 16) + 0) /**< DMA channel select for UART0_RXDATAV */ macro