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Searched refs:DMAREQ_TIMER3_CC0 (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dmareq.h86 #define DMAREQ_TIMER3_CC0 ((27 << 16) + 1) /**< DMA channel select for TIMER3_CC0 */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_dmareq.h107 #define DMAREQ_TIMER3_CC0 ((28 << 16) + 1) /**< DMA channel select for TIMER3_CC0 */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_dmareq.h112 #define DMAREQ_TIMER3_CC0 ((28 << 16) + 1) /**< DMA channel select for TIMER3_CC0 */ macro