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Searched refs:DMAREQ_TIMER2_CC1 (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dmareq.h71 #define DMAREQ_TIMER2_CC1 ((26 << 16) + 2) /**< DMA channel select for TIMER2_CC1 */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dmareq.h83 #define DMAREQ_TIMER2_CC1 ((26 << 16) + 2) /**< DMA channel select for TIMER2_CC1 */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_dmareq.h104 #define DMAREQ_TIMER2_CC1 ((27 << 16) + 2) /**< DMA channel select for TIMER2_CC1 */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_dmareq.h109 #define DMAREQ_TIMER2_CC1 ((27 << 16) + 2) /**< DMA channel select for TIMER2_CC1 */ macro