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Searched refs:CH0CTRL (Results 1 – 11 of 11) sorted by relevance

/hal_silabs-3.5.0/gecko/emlib/src/
Dem_dac.c87 reg = &(dac->CH0CTRL); in DAC_Enable()
119 BUS_RegBitWrite(&(dac->CH0CTRL), _DAC_CH0CTRL_EN_SHIFT, 0); in DAC_Init()
202 dac->CH0CTRL = tmp; in DAC_InitChannel()
303 dac->CH0CTRL = _DAC_CH0CTRL_RESETVALUE; in DAC_Reset()
Dem_vdac.c332 vdac->CH0CTRL = channelConfig; in VDAC_InitChannel()
603 vdac->CH0CTRL = _VDAC_CH0CTRL_RESETVALUE; in VDAC_Reset()
Dem_opamp.c265 dac->CH0CTRL &= ~DAC_CH0CTRL_EN; in OPAMP_Disable()
411 dac->CH0CTRL |= DAC_CH0CTRL_EN; in OPAMP_Enable()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dac.h49 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_vdac.h50 __IOM uint32_t CH0CTRL; /**< Channel 0 Control Register */ member