1 /*
2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef _HARDWARE_UART_H
8 #define _HARDWARE_UART_H
9
10 #include "pico.h"
11 #include "hardware/structs/uart.h"
12
13 // PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_HARDWARE_UART, Enable/disable assertions in the hardware_uart module, type=bool, default=0, group=hardware_uart
14 #ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_UART
15 #ifdef PARAM_ASSERTIONS_ENABLED_UART // backwards compatibility with SDK < 2.0.0
16 #define PARAM_ASSERTIONS_ENABLED_HARDWARE_UART PARAM_ASSERTIONS_ENABLED_UART
17 #else
18 #define PARAM_ASSERTIONS_ENABLED_HARDWARE_UART 0
19 #endif
20 #endif
21
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25
26 // PICO_CONFIG: PICO_UART_ENABLE_CRLF_SUPPORT, Enable/disable CR/LF translation support, type=bool, default=1, group=hardware_uart
27 #ifndef PICO_UART_ENABLE_CRLF_SUPPORT
28 #define PICO_UART_ENABLE_CRLF_SUPPORT 1
29 #endif
30
31 // PICO_CONFIG: PICO_UART_DEFAULT_CRLF, Enable/disable CR/LF translation on UART, type=bool, default=0, depends=PICO_UART_ENABLE_CRLF_SUPPORT, group=hardware_uart
32 #ifndef PICO_UART_DEFAULT_CRLF
33 #define PICO_UART_DEFAULT_CRLF 0
34 #endif
35
36 // PICO_CONFIG: PICO_DEFAULT_UART, Define the default UART used for printf etc, min=0, max=1, default=Usually provided via board header, group=hardware_uart
37 // PICO_CONFIG: PICO_DEFAULT_UART_TX_PIN, Define the default UART TX pin, min=0, max=47 on RP2350B, 29 otherwise, default=Usually provided via board header, group=hardware_uart
38 // PICO_CONFIG: PICO_DEFAULT_UART_RX_PIN, Define the default UART RX pin, min=0, max=47 on RP2350B, 29 otherwise, default=Usually provided via board header, group=hardware_uart
39
40 // PICO_CONFIG: PICO_DEFAULT_UART_BAUD_RATE, Define the default UART baudrate, max=921600, default=115200, group=hardware_uart
41 #ifndef PICO_DEFAULT_UART_BAUD_RATE
42 #define PICO_DEFAULT_UART_BAUD_RATE 115200 ///< Default baud rate
43 #endif
44
45 /** \file hardware/uart.h
46 * \defgroup hardware_uart hardware_uart
47 *
48 * \brief Hardware UART API
49 *
50 * RP-series microcontrollers have 2 identical instances of a UART peripheral, based on the ARM PL011. Each UART can be connected to a number
51 * of GPIO pins as defined in the GPIO muxing.
52 *
53 * Only the TX, RX, RTS, and CTS signals are
54 * connected, meaning that the modem mode and IrDA mode of the PL011 are not supported.
55 *
56 * \subsection uart_example Example
57 * \addtogroup hardware_uart
58 *
59 * \code
60 * int main() {
61 *
62 * // Set the GPIO pin mux to the UART - pin 0 is TX, 1 is RX; note use of UART_FUNCSEL_NUM for the general
63 * // case where the func sel used for UART depends on the pin number
64 * // Do this before calling uart_init to avoid losing data
65 * gpio_set_function(0, UART_FUNCSEL_NUM(uart0, 0));
66 * gpio_set_function(1, UART_FUNCSEL_NUM(uart0, 1));
67 *
68 * // Initialise UART 0
69 * uart_init(uart0, 115200);
70 *
71 * uart_puts(uart0, "Hello world!");
72 * }
73 * \endcode
74 */
75
76 // Currently always a pointer to hw but it might not be in the future
77 typedef struct uart_inst uart_inst_t;
78
79 /** The UART identifiers for use in UART functions.
80 *
81 * e.g. uart_init(uart1, 48000)
82 *
83 * \ingroup hardware_uart
84 * @{
85 */
86 #define uart0 ((uart_inst_t *)uart0_hw) ///< Identifier for UART instance 0
87 #define uart1 ((uart_inst_t *)uart1_hw) ///< Identifier for UART instance 1
88
89 /** @} */
90
91 /**
92 * \def PICO_DEFAULT_UART_INSTANCE()
93 * \ingroup hardware_uart
94 * \hideinitializer
95 * \brief Returns the default UART instance based on the value of PICO_DEFAULT_UART
96 */
97 #if !defined(PICO_DEFAULT_UART_INSTANCE) && defined(PICO_DEFAULT_UART)
98 #define PICO_DEFAULT_UART_INSTANCE() (__CONCAT(uart,PICO_DEFAULT_UART))
99 #endif
100
101 /**
102 * \def PICO_DEFAULT_UART
103 * \ingroup hardware_uart
104 * \hideinitializer
105 * \brief The default UART instance number
106 */
107
108 #ifdef PICO_DEFAULT_UART_INSTANCE
109 #define uart_default PICO_DEFAULT_UART_INSTANCE()
110 #endif
111
112 /**
113 * \def UART_NUM(uart)
114 * \ingroup hardware_uart
115 * \hideinitializer
116 * \brief Returns the UART number for a UART instance
117 *
118 * Note this macro is intended to resolve at compile time, and does no parameter checking
119 */
120 #ifndef UART_NUM
121 static_assert(NUM_UARTS == 2, "");
122 #define UART_NUM(uart) ((uart) == uart1)
123 #endif
124
125 /**
126 * \def UART_INSTANCE(uart_num)
127 * \ingroup hardware_uart
128 * \hideinitializer
129 * \brief Returns the UART instance with the given UART number
130 *
131 * Note this macro is intended to resolve at compile time, and does no parameter checking
132 */
133 #ifndef UART_INSTANCE
134 static_assert(NUM_UARTS == 2, "");
135 #define UART_INSTANCE(num) ((num) ? uart1 : uart0)
136 #endif
137
138 /**
139 * \def UART_DREQ_NUM(uart, is_tx)
140 * \ingroup hardware_uart
141 * \hideinitializer
142 * \brief Returns the \ref dreq_num_t used for pacing DMA transfers to or from this UART instance.
143 * If is_tx is true, then it is for transfers to the UART else for transfers from the UART.
144 *
145 * Note this macro is intended to resolve at compile time, and does no parameter checking
146 */
147 #ifndef UART_DREQ_NUM
148 #include "hardware/regs/dreq.h"
149 static_assert(DREQ_UART0_RX == DREQ_UART0_TX + 1, "");
150 static_assert(DREQ_UART1_RX == DREQ_UART1_TX + 1, "");
151 static_assert(DREQ_UART1_TX == DREQ_UART0_TX + 2, "");
152 #define UART_DREQ_NUM(uart, is_tx) ({ \
153 DREQ_UART0_TX + UART_NUM(uart) * 2 + !(is_tx); \
154 })
155 #endif
156
157 /**
158 * \def UART_CLOCK_NUM(uart)
159 * \ingroup hardware_uart
160 * \hideinitializer
161 * \brief Returns \ref clock_num_t of the clock for the given UART instance
162 *
163 * Note this macro is intended to resolve at compile time, and does no parameter checking
164 */
165 #ifndef UART_CLOCK_NUM
166 #define UART_CLOCK_NUM(uart) clk_peri
167 #endif
168
169 /**
170 * \def UART_FUNCSEL_NUM(uart, gpio)
171 * \ingroup hardware_uart
172 * \hideinitializer
173 * \brief Returns \ref gpio_function_t needed to select the UART function for the given UART instance on the given GPIO number.
174 *
175 * Note this macro is intended to resolve at compile time, and does no parameter checking
176 */
177 #ifndef UART_FUNCSEL_NUM
178 #if PICO_RP2040
179 #define UART_FUNCSEL_NUM(uart, gpio) GPIO_FUNC_UART
180 #else
181 #define UART_FUNCSEL_NUM(uart, gpio) ((gpio) & 0x2 ? GPIO_FUNC_UART_AUX : GPIO_FUNC_UART)
182 #endif
183 #endif
184
185 /**
186 * \def UART_IRQ_NUM(uart)
187 * \ingroup hardware_uart
188 * \hideinitializer
189 * \brief Returns the \ref irq_num_t for processor interrupts from the given UART instance
190 *
191 * Note this macro is intended to resolve at compile time, and does no parameter checking
192 */
193 #ifndef UART_IRQ_NUM
194 #include "hardware/regs/intctrl.h"
195 static_assert(UART1_IRQ == UART0_IRQ + 1, "");
196 #define UART_IRQ_NUM(uart) (UART0_IRQ + UART_NUM(uart))
197 #endif
198
199 /**
200 * \def UART_RESET_NUM(uart)
201 * \ingroup hardware_uart
202 * \hideinitializer
203 * \brief Returns the \ref reset_num_t used to reset a given UART instance
204 *
205 * Note this macro is intended to resolve at compile time, and does no parameter checking
206 */
207 #ifndef UART_RESET_NUM
208 #include "hardware/resets.h"
209 #define UART_RESET_NUM(uart) (uart_get_index(uart) ? RESET_UART1 : RESET_UART0)
210 #endif
211
212 /*! \brief Convert UART instance to hardware instance number
213 * \ingroup hardware_uart
214 *
215 * \param uart UART instance
216 * \return Number of UART, 0 or 1
217 */
uart_get_index(uart_inst_t * uart)218 static inline uint uart_get_index(uart_inst_t *uart) {
219 invalid_params_if(HARDWARE_UART, uart != uart0 && uart != uart1);
220 return UART_NUM(uart);
221 }
222
223 /*! \brief Get the UART instance from an instance number
224 * \ingroup hardware_uart
225 *
226 * \param num Number of UART, 0 or 1
227 * \return UART instance
228 */
uart_get_instance(uint num)229 static inline uart_inst_t *uart_get_instance(uint num) {
230 invalid_params_if(HARDWARE_UART, num >= NUM_UARTS);
231 return UART_INSTANCE(num);
232 }
233
234 /*! \brief Get the real hardware UART instance from a UART instance
235 * \ingroup hardware_uart
236 *
237 * This extra level of abstraction was added to facilitate adding PIO UARTs in the future.
238 * It currently does nothing, and costs nothing.
239 *
240 * \param uart UART instance
241 * \return The uart_hw_t pointer to the UART instance registers
242 */
uart_get_hw(uart_inst_t * uart)243 static inline uart_hw_t *uart_get_hw(uart_inst_t *uart) {
244 uart_get_index(uart); // check it is a hw uart
245 return (uart_hw_t *)uart;
246 }
247
248 /** \brief UART Parity enumeration
249 * \ingroup hardware_uart
250 */
251 typedef enum {
252 UART_PARITY_NONE,
253 UART_PARITY_EVEN,
254 UART_PARITY_ODD
255 } uart_parity_t;
256
257 // ----------------------------------------------------------------------------
258 // Setup
259
260 /*! \brief Initialise a UART
261 * \ingroup hardware_uart
262 *
263 * Put the UART into a known state, and enable it. Must be called before other
264 * functions.
265 *
266 * This function always enables the FIFOs, and configures the UART for the
267 * following default line format:
268 *
269 * - 8 data bits
270 * - No parity bit
271 * - One stop bit
272 *
273 * \note There is no guarantee that the baudrate requested will be possible, the nearest will be chosen,
274 * and this function will return the configured baud rate.
275 *
276 * \param uart UART instance. \ref uart0 or \ref uart1
277 * \param baudrate Baudrate of UART in Hz
278 * \return Actual set baudrate
279 */
280 uint uart_init(uart_inst_t *uart, uint baudrate);
281
282 /*! \brief DeInitialise a UART
283 * \ingroup hardware_uart
284 *
285 * Disable the UART if it is no longer used. Must be reinitialised before
286 * being used again.
287 *
288 * \param uart UART instance. \ref uart0 or \ref uart1
289 */
290 void uart_deinit(uart_inst_t *uart);
291
292 /*! \brief Set UART baud rate
293 * \ingroup hardware_uart
294 *
295 * Set baud rate as close as possible to requested, and return actual rate selected.
296 *
297 * The UART is paused for around two character periods whilst the settings are
298 * changed. Data received during this time may be dropped by the UART.
299 *
300 * Any characters still in the transmit buffer will be sent using the new
301 * updated baud rate. uart_tx_wait_blocking() can be called before this
302 * function to ensure all characters at the old baud rate have been sent
303 * before the rate is changed.
304 *
305 * This function should not be called from an interrupt context, and the UART
306 * interrupt should be disabled before calling this function.
307 *
308 * \param uart UART instance. \ref uart0 or \ref uart1
309 * \param baudrate Baudrate in Hz
310 * \return Actual set baudrate
311 */
312 uint uart_set_baudrate(uart_inst_t *uart, uint baudrate);
313
314 /*! \brief Set UART flow control CTS/RTS
315 * \ingroup hardware_uart
316 *
317 * \param uart UART instance. \ref uart0 or \ref uart1
318 * \param cts If true enable flow control of TX by clear-to-send input
319 * \param rts If true enable assertion of request-to-send output by RX flow control
320 */
uart_set_hw_flow(uart_inst_t * uart,bool cts,bool rts)321 static inline void uart_set_hw_flow(uart_inst_t *uart, bool cts, bool rts) {
322 hw_write_masked(&uart_get_hw(uart)->cr,
323 (bool_to_bit(cts) << UART_UARTCR_CTSEN_LSB) | (bool_to_bit(rts) << UART_UARTCR_RTSEN_LSB),
324 UART_UARTCR_RTSEN_BITS | UART_UARTCR_CTSEN_BITS);
325 }
326
327 /*! \brief Set UART data format
328 * \ingroup hardware_uart
329 *
330 * Configure the data format (bits etc) for the UART.
331 *
332 * The UART is paused for around two character periods whilst the settings are
333 * changed. Data received during this time may be dropped by the UART.
334 *
335 * Any characters still in the transmit buffer will be sent using the new
336 * updated data format. uart_tx_wait_blocking() can be called before this
337 * function to ensure all characters needing the old format have been sent
338 * before the format is changed.
339 *
340 * This function should not be called from an interrupt context, and the UART
341 * interrupt should be disabled before calling this function.
342 *
343 * \param uart UART instance. \ref uart0 or \ref uart1
344 * \param data_bits Number of bits of data. 5..8
345 * \param stop_bits Number of stop bits 1..2
346 * \param parity Parity option.
347 */
348 void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_bits, uart_parity_t parity);
349
350 /*! \brief Enable/Disable UART interrupt outputs
351 * \ingroup hardware_uart
352 *
353 * Enable/Disable the UART's interrupt outputs. An interrupt handler should be installed prior to calling
354 * this function.
355 *
356 * \param uart UART instance. \ref uart0 or \ref uart1
357 * \param rx_has_data If true an interrupt will be fired when the RX FIFO contains data.
358 * \param tx_needs_data If true an interrupt will be fired when the TX FIFO needs data.
359 */
uart_set_irqs_enabled(uart_inst_t * uart,bool rx_has_data,bool tx_needs_data)360 static inline void uart_set_irqs_enabled(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
361 // Both UARTRXINTR (RX) and UARTRTINTR (RX timeout) interrupts are
362 // required for rx_has_data. RX asserts when >=4 characters are in the RX
363 // FIFO (for RXIFLSEL=0). RT asserts when there are >=1 characters and no
364 // more have been received for 32 bit periods.
365 uart_get_hw(uart)->imsc = (bool_to_bit(tx_needs_data) << UART_UARTIMSC_TXIM_LSB) |
366 (bool_to_bit(rx_has_data) << UART_UARTIMSC_RXIM_LSB) |
367 (bool_to_bit(rx_has_data) << UART_UARTIMSC_RTIM_LSB);
368 if (rx_has_data) {
369 // Set minimum threshold
370 hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_RXIFLSEL_LSB,
371 UART_UARTIFLS_RXIFLSEL_BITS);
372 }
373 if (tx_needs_data) {
374 // Set maximum threshold
375 hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_TXIFLSEL_LSB,
376 UART_UARTIFLS_TXIFLSEL_BITS);
377 }
378 }
379
380 // backwards compatibility with SDK version < 2.0.0
uart_set_irq_enables(uart_inst_t * uart,bool rx_has_data,bool tx_needs_data)381 static inline void uart_set_irq_enables(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
382 uart_set_irqs_enabled(uart, rx_has_data, tx_needs_data);
383 }
384
385 /*! \brief Test if specific UART is enabled
386 * \ingroup hardware_uart
387 *
388 * \param uart UART instance. \ref uart0 or \ref uart1
389 * \return true if the UART is enabled
390 */
uart_is_enabled(uart_inst_t * uart)391 static inline bool uart_is_enabled(uart_inst_t *uart) {
392 return uart_get_hw(uart)->cr & UART_UARTCR_UARTEN_BITS;
393 }
394
395 /*! \brief Enable/Disable the FIFOs on specified UART
396 * \ingroup hardware_uart
397 *
398 * The UART is paused for around two character periods whilst the settings are
399 * changed. Data received during this time may be dropped by the UART.
400 *
401 * Any characters still in the transmit FIFO will be lost if the FIFO is
402 * disabled. uart_tx_wait_blocking() can be called before this
403 * function to avoid this.
404 *
405 * This function should not be called from an interrupt context, and the UART
406 * interrupt should be disabled when calling this function.
407 *
408 * \param uart UART instance. \ref uart0 or \ref uart1
409 * \param enabled true to enable FIFO (default), false to disable
410 */
411 void uart_set_fifo_enabled(uart_inst_t *uart, bool enabled);
412
413 // ----------------------------------------------------------------------------
414 // Generic input/output
415
416 /*! \brief Determine if space is available in the TX FIFO
417 * \ingroup hardware_uart
418 *
419 * \param uart UART instance. \ref uart0 or \ref uart1
420 * \return false if no space available, true otherwise
421 */
uart_is_writable(uart_inst_t * uart)422 static inline bool uart_is_writable(uart_inst_t *uart) {
423 return !(uart_get_hw(uart)->fr & UART_UARTFR_TXFF_BITS);
424 }
425
426 /*! \brief Wait for the UART TX fifo to be drained
427 * \ingroup hardware_uart
428 *
429 * \param uart UART instance. \ref uart0 or \ref uart1
430 */
uart_tx_wait_blocking(uart_inst_t * uart)431 static inline void uart_tx_wait_blocking(uart_inst_t *uart) {
432 while (uart_get_hw(uart)->fr & UART_UARTFR_BUSY_BITS) tight_loop_contents();
433 }
434
435 /*! \brief Determine whether data is waiting in the RX FIFO
436 * \ingroup hardware_uart
437 *
438 * \param uart UART instance. \ref uart0 or \ref uart1
439 * \return true if the RX FIFO is not empty, otherwise false.
440 *
441 */
uart_is_readable(uart_inst_t * uart)442 static inline bool uart_is_readable(uart_inst_t *uart) {
443 // PL011 doesn't expose levels directly, so return values are only 0 or 1
444 return !(uart_get_hw(uart)->fr & UART_UARTFR_RXFE_BITS);
445 }
446
447 /*! \brief Write to the UART for transmission.
448 * \ingroup hardware_uart
449 *
450 * This function will block until all the data has been sent to the UART transmit buffer
451 * hardware. Note: Serial data transmission will continue until the Tx FIFO and
452 * the transmit shift register (not programmer-accessible) are empty.
453 * To ensure the UART FIFO has been emptied, you can use \ref uart_tx_wait_blocking()
454 *
455 * \param uart UART instance. \ref uart0 or \ref uart1
456 * \param src The bytes to send
457 * \param len The number of bytes to send
458 */
uart_write_blocking(uart_inst_t * uart,const uint8_t * src,size_t len)459 static inline void uart_write_blocking(uart_inst_t *uart, const uint8_t *src, size_t len) {
460 for (size_t i = 0; i < len; ++i) {
461 while (!uart_is_writable(uart))
462 tight_loop_contents();
463 uart_get_hw(uart)->dr = *src++;
464 }
465 }
466
467 /*! \brief Read from the UART
468 * \ingroup hardware_uart
469 *
470 * This function blocks until len characters have been read from the UART
471 *
472 * \param uart UART instance. \ref uart0 or \ref uart1
473 * \param dst Buffer to accept received bytes
474 * \param len The number of bytes to receive.
475 */
uart_read_blocking(uart_inst_t * uart,uint8_t * dst,size_t len)476 static inline void uart_read_blocking(uart_inst_t *uart, uint8_t *dst, size_t len) {
477 for (size_t i = 0; i < len; ++i) {
478 while (!uart_is_readable(uart))
479 tight_loop_contents();
480 *dst++ = (uint8_t) uart_get_hw(uart)->dr;
481 }
482 }
483
484 // ----------------------------------------------------------------------------
485 // UART-specific operations and aliases
486
487 /*! \brief Write single character to UART for transmission.
488 * \ingroup hardware_uart
489 *
490 * This function will block until the entire character has been sent to the UART transmit buffer
491 *
492 * \param uart UART instance. \ref uart0 or \ref uart1
493 * \param c The character to send
494 */
uart_putc_raw(uart_inst_t * uart,char c)495 static inline void uart_putc_raw(uart_inst_t *uart, char c) {
496 uart_write_blocking(uart, (const uint8_t *) &c, 1);
497 }
498
499 /*! \brief Write single character to UART for transmission, with optional CR/LF conversions
500 * \ingroup hardware_uart
501 *
502 * This function will block until the character has been sent to the UART transmit buffer
503 *
504 * \param uart UART instance. \ref uart0 or \ref uart1
505 * \param c The character to send
506 */
uart_putc(uart_inst_t * uart,char c)507 static inline void uart_putc(uart_inst_t *uart, char c) {
508 #if PICO_UART_ENABLE_CRLF_SUPPORT
509 extern short uart_char_to_line_feed[NUM_UARTS];
510 if (uart_char_to_line_feed[uart_get_index(uart)] == c)
511 uart_putc_raw(uart, '\r');
512 #endif
513 uart_putc_raw(uart, c);
514 }
515
516 /*! \brief Write string to UART for transmission, doing any CR/LF conversions
517 * \ingroup hardware_uart
518 *
519 * This function will block until the entire string has been sent to the UART transmit buffer
520 *
521 * \param uart UART instance. \ref uart0 or \ref uart1
522 * \param s The null terminated string to send
523 */
uart_puts(uart_inst_t * uart,const char * s)524 static inline void uart_puts(uart_inst_t *uart, const char *s) {
525 #if PICO_UART_ENABLE_CRLF_SUPPORT
526 bool last_was_cr = false;
527 while (*s) {
528 // Don't add extra carriage returns if one is present
529 if (last_was_cr)
530 uart_putc_raw(uart, *s);
531 else
532 uart_putc(uart, *s);
533 last_was_cr = *s++ == '\r';
534 }
535 #else
536 while (*s)
537 uart_putc(uart, *s++);
538 #endif
539 }
540
541 /*! \brief Read a single character from the UART
542 * \ingroup hardware_uart
543 *
544 * This function will block until a character has been read
545 *
546 * \param uart UART instance. \ref uart0 or \ref uart1
547 * \return The character read.
548 */
uart_getc(uart_inst_t * uart)549 static inline char uart_getc(uart_inst_t *uart) {
550 char c;
551 uart_read_blocking(uart, (uint8_t *) &c, 1);
552 return c;
553 }
554
555 /*! \brief Assert a break condition on the UART transmission.
556 * \ingroup hardware_uart
557 *
558 * \param uart UART instance. \ref uart0 or \ref uart1
559 * \param en Assert break condition (TX held low) if true. Clear break condition if false.
560 */
561 void uart_set_break(uart_inst_t *uart, bool en);
562
563 /*! \brief Set CR/LF conversion on UART
564 * \ingroup hardware_uart
565 *
566 * \param uart UART instance. \ref uart0 or \ref uart1
567 * \param translate If true, convert line feeds to carriage return on transmissions
568 */
569 void uart_set_translate_crlf(uart_inst_t *uart, bool translate);
570
571 /*! \brief Wait for the default UART's TX FIFO to be drained
572 * \ingroup hardware_uart
573 */
uart_default_tx_wait_blocking(void)574 static inline void uart_default_tx_wait_blocking(void) {
575 #ifdef uart_default
576 uart_tx_wait_blocking(uart_default);
577 #else
578 assert(false);
579 #endif
580 }
581
582 /*! \brief Wait for up to a certain number of microseconds for the RX FIFO to be non empty
583 * \ingroup hardware_uart
584 *
585 * \param uart UART instance. \ref uart0 or \ref uart1
586 * \param us the number of microseconds to wait at most (may be 0 for an instantaneous check)
587 * \return true if the RX FIFO became non empty before the timeout, false otherwise
588 */
589 bool uart_is_readable_within_us(uart_inst_t *uart, uint32_t us);
590
591 /*! \brief Return the \ref dreq_num_t to use for pacing transfers to/from a particular UART instance
592 * \ingroup hardware_uart
593 *
594 * \param uart UART instance. \ref uart0 or \ref uart1
595 * \param is_tx true for sending data to the UART instance, false for receiving data from the UART instance
596 */
uart_get_dreq_num(uart_inst_t * uart,bool is_tx)597 static inline uint uart_get_dreq_num(uart_inst_t *uart, bool is_tx) {
598 return UART_DREQ_NUM(uart, is_tx);
599 }
600
601 /*! \brief Return the \ref reset_num_t to use to reset a particular UART instance
602 * \ingroup hardware_uart
603 *
604 * \param uart UART instance. \ref uart0 or \ref uart1
605 */
uart_get_reset_num(uart_inst_t * uart)606 static inline uint uart_get_reset_num(uart_inst_t *uart) {
607 return UART_RESET_NUM(uart);
608 }
609
610 // backwards compatibility
uart_get_dreq(uart_inst_t * uart,bool is_tx)611 static inline uint uart_get_dreq(uart_inst_t *uart, bool is_tx) {
612 return uart_get_dreq_num(uart, is_tx);
613 }
614
615 #ifdef __cplusplus
616 }
617 #endif
618
619 #endif
620
