1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /** 4 * Copyright (c) 2024 Raspberry Pi Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 #ifndef _INTCTRL_H 9 #define _INTCTRL_H 10 11 /** 12 * \file rp2350/intctrl.h 13 */ 14 15 #ifdef __ASSEMBLER__ 16 #define TIMER0_IRQ_0 0 17 #define TIMER0_IRQ_1 1 18 #define TIMER0_IRQ_2 2 19 #define TIMER0_IRQ_3 3 20 #define TIMER1_IRQ_0 4 21 #define TIMER1_IRQ_1 5 22 #define TIMER1_IRQ_2 6 23 #define TIMER1_IRQ_3 7 24 #define PWM_IRQ_WRAP_0 8 25 #define PWM_IRQ_WRAP_1 9 26 #define DMA_IRQ_0 10 27 #define DMA_IRQ_1 11 28 #define DMA_IRQ_2 12 29 #define DMA_IRQ_3 13 30 #define USBCTRL_IRQ 14 31 #define PIO0_IRQ_0 15 32 #define PIO0_IRQ_1 16 33 #define PIO1_IRQ_0 17 34 #define PIO1_IRQ_1 18 35 #define PIO2_IRQ_0 19 36 #define PIO2_IRQ_1 20 37 #define IO_IRQ_BANK0 21 38 #define IO_IRQ_BANK0_NS 22 39 #define IO_IRQ_QSPI 23 40 #define IO_IRQ_QSPI_NS 24 41 #define SIO_IRQ_FIFO 25 42 #define SIO_IRQ_BELL 26 43 #define SIO_IRQ_FIFO_NS 27 44 #define SIO_IRQ_BELL_NS 28 45 #define SIO_IRQ_MTIMECMP 29 46 #define CLOCKS_IRQ 30 47 #define SPI0_IRQ 31 48 #define SPI1_IRQ 32 49 #define UART0_IRQ 33 50 #define UART1_IRQ 34 51 #define ADC_IRQ_FIFO 35 52 #define I2C0_IRQ 36 53 #define I2C1_IRQ 37 54 #define OTP_IRQ 38 55 #define TRNG_IRQ 39 56 #define PROC0_IRQ_CTI 40 57 #define PROC1_IRQ_CTI 41 58 #define PLL_SYS_IRQ 42 59 #define PLL_USB_IRQ 43 60 #define POWMAN_IRQ_POW 44 61 #define POWMAN_IRQ_TIMER 45 62 #define SPAREIRQ_IRQ_0 46 63 #define SPAREIRQ_IRQ_1 47 64 #define SPAREIRQ_IRQ_2 48 65 #define SPAREIRQ_IRQ_3 49 66 #define SPAREIRQ_IRQ_4 50 67 #define SPAREIRQ_IRQ_5 51 68 #else 69 /** 70 * \brief Interrupt numbers on RP2350 (used as typedef \ref irq_num_t) 71 * \ingroup hardware_irq 72 */ 73 typedef enum irq_num_rp2350 { 74 TIMER0_IRQ_0 = 0, ///< Select TIMER0's IRQ 0 output 75 TIMER0_IRQ_1 = 1, ///< Select TIMER0's IRQ 1 output 76 TIMER0_IRQ_2 = 2, ///< Select TIMER0's IRQ 2 output 77 TIMER0_IRQ_3 = 3, ///< Select TIMER0's IRQ 3 output 78 TIMER1_IRQ_0 = 4, ///< Select TIMER1's IRQ 0 output 79 TIMER1_IRQ_1 = 5, ///< Select TIMER1's IRQ 1 output 80 TIMER1_IRQ_2 = 6, ///< Select TIMER1's IRQ 2 output 81 TIMER1_IRQ_3 = 7, ///< Select TIMER1's IRQ 3 output 82 PWM_IRQ_WRAP_0 = 8, ///< Select PWM's IRQ_WRAP 0 output 83 PWM_IRQ_WRAP_1 = 9, ///< Select PWM's IRQ_WRAP 1 output 84 DMA_IRQ_0 = 10, ///< Select DMA's IRQ 0 output 85 DMA_IRQ_1 = 11, ///< Select DMA's IRQ 1 output 86 DMA_IRQ_2 = 12, ///< Select DMA's IRQ 2 output 87 DMA_IRQ_3 = 13, ///< Select DMA's IRQ 3 output 88 USBCTRL_IRQ = 14, ///< Select USBCTRL's IRQ output 89 PIO0_IRQ_0 = 15, ///< Select PIO0's IRQ 0 output 90 PIO0_IRQ_1 = 16, ///< Select PIO0's IRQ 1 output 91 PIO1_IRQ_0 = 17, ///< Select PIO1's IRQ 0 output 92 PIO1_IRQ_1 = 18, ///< Select PIO1's IRQ 1 output 93 PIO2_IRQ_0 = 19, ///< Select PIO2's IRQ 0 output 94 PIO2_IRQ_1 = 20, ///< Select PIO2's IRQ 1 output 95 IO_IRQ_BANK0 = 21, ///< Select IO_BANK0's IRQ output 96 IO_IRQ_BANK0_NS = 22, ///< Select IO_BANK0_NS's IRQ output 97 IO_IRQ_QSPI = 23, ///< Select IO_QSPI's IRQ output 98 IO_IRQ_QSPI_NS = 24, ///< Select IO_QSPI_NS's IRQ output 99 SIO_IRQ_FIFO = 25, ///< Select SIO's IRQ_FIFO output 100 SIO_IRQ_BELL = 26, ///< Select SIO's IRQ_BELL output 101 SIO_IRQ_FIFO_NS = 27, ///< Select SIO_NS's IRQ_FIFO output 102 SIO_IRQ_BELL_NS = 28, ///< Select SIO_NS's IRQ_BELL output 103 SIO_IRQ_MTIMECMP = 29, ///< Select SIO_IRQ_MTIMECMP's IRQ output 104 CLOCKS_IRQ = 30, ///< Select CLOCKS's IRQ output 105 SPI0_IRQ = 31, ///< Select SPI0's IRQ output 106 SPI1_IRQ = 32, ///< Select SPI1's IRQ output 107 UART0_IRQ = 33, ///< Select UART0's IRQ output 108 UART1_IRQ = 34, ///< Select UART1's IRQ output 109 ADC_IRQ_FIFO = 35, ///< Select ADC's IRQ_FIFO output 110 I2C0_IRQ = 36, ///< Select I2C0's IRQ output 111 I2C1_IRQ = 37, ///< Select I2C1's IRQ output 112 OTP_IRQ = 38, ///< Select OTP's IRQ output 113 TRNG_IRQ = 39, ///< Select TRNG's IRQ output 114 PROC0_IRQ_CTI = 40, ///< Select PROC0's IRQ_CTI output 115 PROC1_IRQ_CTI = 41, ///< Select PROC1's IRQ_CTI output 116 PLL_SYS_IRQ = 42, ///< Select PLL_SYS's IRQ output 117 PLL_USB_IRQ = 43, ///< Select PLL_USB's IRQ output 118 POWMAN_IRQ_POW = 44, ///< Select POWMAN's IRQ_POW output 119 POWMAN_IRQ_TIMER = 45, ///< Select POWMAN's IRQ_TIMER output 120 SPARE_IRQ_0 = 46, ///< Select SPARE IRQ 0 121 SPARE_IRQ_1 = 47, ///< Select SPARE IRQ 1 122 SPARE_IRQ_2 = 48, ///< Select SPARE IRQ 2 123 SPARE_IRQ_3 = 49, ///< Select SPARE IRQ 3 124 SPARE_IRQ_4 = 50, ///< Select SPARE IRQ 4 125 SPARE_IRQ_5 = 51, ///< Select SPARE IRQ 5 126 IRQ_COUNT 127 } irq_num_t; 128 #endif 129 130 #define isr_timer0_0 isr_irq0 131 #define isr_timer0_1 isr_irq1 132 #define isr_timer0_2 isr_irq2 133 #define isr_timer0_3 isr_irq3 134 #define isr_timer1_0 isr_irq4 135 #define isr_timer1_1 isr_irq5 136 #define isr_timer1_2 isr_irq6 137 #define isr_timer1_3 isr_irq7 138 #define isr_pwm_wrap_0 isr_irq8 139 #define isr_pwm_wrap_1 isr_irq9 140 #define isr_dma_0 isr_irq10 141 #define isr_dma_1 isr_irq11 142 #define isr_dma_2 isr_irq12 143 #define isr_dma_3 isr_irq13 144 #define isr_usbctrl isr_irq14 145 #define isr_pio0_0 isr_irq15 146 #define isr_pio0_1 isr_irq16 147 #define isr_pio1_0 isr_irq17 148 #define isr_pio1_1 isr_irq18 149 #define isr_pio2_0 isr_irq19 150 #define isr_pio2_1 isr_irq20 151 #define isr_io_bank0 isr_irq21 152 #define isr_io_bank0_ns isr_irq22 153 #define isr_io_qspi isr_irq23 154 #define isr_io_qspi_ns isr_irq24 155 #define isr_sio_fifo isr_irq25 156 #define isr_sio_bell isr_irq26 157 #define isr_sio_fifo_ns isr_irq27 158 #define isr_sio_bell_ns isr_irq28 159 #define isr_sio_mtimecmp isr_irq29 160 #define isr_clocks isr_irq30 161 #define isr_spi0 isr_irq31 162 #define isr_spi1 isr_irq32 163 #define isr_uart0 isr_irq33 164 #define isr_uart1 isr_irq34 165 #define isr_adc_fifo isr_irq35 166 #define isr_i2c0 isr_irq36 167 #define isr_i2c1 isr_irq37 168 #define isr_otp isr_irq38 169 #define isr_trng isr_irq39 170 #define isr_proc0_cti isr_irq40 171 #define isr_proc1_cti isr_irq41 172 #define isr_pll_sys isr_irq42 173 #define isr_pll_usb isr_irq43 174 #define isr_powman_pow isr_irq44 175 #define isr_powman_timer isr_irq45 176 #define isr_spare_0 isr_irq46 177 #define isr_spare_1 isr_irq47 178 #define isr_spare_2 isr_irq48 179 #define isr_spare_3 isr_irq49 180 #define isr_spare_4 isr_irq50 181 #define isr_spare_5 isr_irq51 182 183 #endif // _INTCTRL_H 184 185