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/hal_rpi_pico-latest/src/rp2_common/hardware_pwm/include/hardware/
Dpwm.h546 static inline void pwm_set_enabled(uint slice_num, bool enabled) { in pwm_set_enabled() argument
548 …hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(enabled) << PWM_CH0_CSR_EN_LSB, PWM_CH0… in pwm_set_enabled()
597 static inline void pwm_set_irq_enabled(uint slice_num, bool enabled) { in pwm_set_irq_enabled() argument
599 if (enabled) { in pwm_set_irq_enabled()
614 static inline void pwm_set_irq0_enabled(uint slice_num, bool enabled) { in pwm_set_irq0_enabled() argument
616 pwm_set_irq_enabled(slice_num, enabled); in pwm_set_irq0_enabled()
628 static inline void pwm_set_irq1_enabled(uint slice_num, bool enabled) { in pwm_set_irq1_enabled() argument
630 if (enabled) { in pwm_set_irq1_enabled()
649 static inline void pwm_irqn_set_slice_enabled(uint irq_index, uint slice_num, bool enabled) { in pwm_irqn_set_slice_enabled() argument
653 if (enabled) { in pwm_irqn_set_slice_enabled()
[all …]
/hal_rpi_pico-latest/src/rp2_common/hardware_gpio/
Dgpio.c106 void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled) { in gpio_set_input_hysteresis_enabled() argument
108 if (enabled) in gpio_set_input_hysteresis_enabled()
173 static void _gpio_set_irq_enabled(uint gpio, uint32_t events, bool enabled, io_bank0_irq_ctrl_hw_t … in _gpio_set_irq_enabled() argument
180 if (enabled) in _gpio_set_irq_enabled()
186 void gpio_set_irq_enabled(uint gpio, uint32_t events, bool enabled) { in gpio_set_irq_enabled() argument
203 _gpio_set_irq_enabled(gpio, events, enabled, irq_ctrl_base); in gpio_set_irq_enabled()
206 void gpio_set_irq_enabled_with_callback(uint gpio, uint32_t events, bool enabled, gpio_irq_callback… in gpio_set_irq_enabled_with_callback() argument
209 gpio_set_irq_enabled(gpio, events, enabled); in gpio_set_irq_enabled_with_callback()
210 if (enabled) irq_set_enabled(IO_IRQ_BANK0, true); in gpio_set_irq_enabled_with_callback()
258 void gpio_set_dormant_irq_enabled(uint gpio, uint32_t events, bool enabled) { in gpio_set_dormant_irq_enabled() argument
[all …]
/hal_rpi_pico-latest/src/rp2_common/hardware_dma/include/hardware/
Ddma.h558 static inline void dma_channel_set_irq0_enabled(uint channel, bool enabled) { in dma_channel_set_irq0_enabled() argument
561 if (enabled) in dma_channel_set_irq0_enabled()
573 static inline void dma_set_irq0_channel_mask_enabled(uint32_t channel_mask, bool enabled) { in dma_set_irq0_channel_mask_enabled() argument
574 if (enabled) { in dma_set_irq0_channel_mask_enabled()
587 static inline void dma_channel_set_irq1_enabled(uint channel, bool enabled) { in dma_channel_set_irq1_enabled() argument
590 if (enabled) in dma_channel_set_irq1_enabled()
602 static inline void dma_set_irq1_channel_mask_enabled(uint32_t channel_mask, bool enabled) { in dma_set_irq1_channel_mask_enabled() argument
603 if (enabled) { in dma_set_irq1_channel_mask_enabled()
617 static inline void dma_irqn_set_channel_enabled(uint irq_index, uint channel, bool enabled) { in dma_irqn_set_channel_enabled() argument
620 if (enabled) in dma_irqn_set_channel_enabled()
[all …]
/hal_rpi_pico-latest/src/host/hardware_irq/include/hardware/
Dirq.h169 void irq_set_enabled(uint num, bool enabled);
185 void irq_set_mask_enabled(uint32_t mask, bool enabled);
194 void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled);
/hal_rpi_pico-latest/src/rp2_common/pico_multicore/
Dmulticore.c118 bool enabled = pico_irq_is_enabled(irq_num); in multicore_reset_core1() local
131 irq_set_enabled(irq_num, enabled); in multicore_reset_core1()
174 bool enabled = pico_irq_is_enabled(irq_num); in multicore_launch_core1_raw() local
200 irq_set_enabled(irq_num, enabled); in multicore_launch_core1_raw()
248 bool enabled = pico_irq_is_enabled(irq_num); in multicore_lockout_handshake() local
249 if (enabled) irq_set_enabled(irq_num, false); in multicore_lockout_handshake()
269 if (enabled) irq_set_enabled(irq_num, true); in multicore_lockout_handshake()
/hal_rpi_pico-latest/src/rp2_common/hardware_irq/include/hardware/
Dirq.h252 void irq_set_enabled(uint num, bool enabled);
268 void irq_set_mask_enabled(uint32_t mask, bool enabled);
277 void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled);
/hal_rpi_pico-latest/src/host/hardware_irq/
Dirq.c25 void PICO_WEAK_FUNCTION_IMPL_NAME(irq_set_enabled)(uint num, bool enabled) { in PICO_WEAK_FUNCTION_DEF()
35 void PICO_WEAK_FUNCTION_IMPL_NAME(irq_set_mask_enabled)(uint32_t mask, bool enabled) { in PICO_WEAK_FUNCTION_DEF()
40 void PICO_WEAK_FUNCTION_IMPL_NAME(irq_set_mask_n_enabled)(uint n, uint32_t mask, bool enabled) { in PICO_WEAK_FUNCTION_DEF()
/hal_rpi_pico-latest/src/rp2_common/hardware_riscv_platform_timer/include/hardware/
Driscv_platform_timer.h33 static inline void riscv_timer_set_enabled(bool enabled) { in riscv_timer_set_enabled() argument
34 if (enabled) { in riscv_timer_set_enabled()
/hal_rpi_pico-latest/src/rp2_common/hardware_pio/include/hardware/
Dpio.h1009 static inline void pio_sm_set_enabled(PIO pio, uint sm, bool enabled) { in pio_sm_set_enabled() argument
1012 pio->ctrl = (pio->ctrl & ~(1u << sm)) | (bool_to_bit(enabled) << sm); in pio_sm_set_enabled()
1028 static inline void pio_set_sm_mask_enabled(PIO pio, uint32_t mask, bool enabled) { in pio_set_sm_mask_enabled() argument
1031 pio->ctrl = (pio->ctrl & ~mask) | (enabled ? mask : 0u); in pio_set_sm_mask_enabled()
1050 …_multi_mask_enabled(PIO pio, uint32_t mask_prev, uint32_t mask, uint32_t mask_next, bool enabled) { in pio_set_sm_multi_mask_enabled() argument
1054 (enabled ? ((mask << PIO_CTRL_SM_ENABLE_LSB) & PIO_CTRL_SM_ENABLE_BITS) : 0) | in pio_set_sm_multi_mask_enabled()
1055 (enabled ? PIO_CTRL_NEXTPREV_SM_ENABLE_BITS : PIO_CTRL_NEXTPREV_SM_DISABLE_BITS) | in pio_set_sm_multi_mask_enabled()
1273 static inline void pio_set_irq0_source_enabled(PIO pio, pio_interrupt_source_t source, bool enabled… in pio_set_irq0_source_enabled() argument
1276 if (enabled) in pio_set_irq0_source_enabled()
1289 static inline void pio_set_irq1_source_enabled(PIO pio, pio_interrupt_source_t source, bool enabled… in pio_set_irq1_source_enabled() argument
[all …]
/hal_rpi_pico-latest/src/rp2_common/hardware_irq/
Dirq.c61 void irq_set_enabled(uint num, bool enabled) { in irq_set_enabled() argument
64 irq_set_mask_n_enabled(num / 32, 1u << (num % 32), enabled); in irq_set_enabled()
78 static inline void irq_set_mask_n_enabled_internal(uint n, uint32_t mask, bool enabled) { in irq_set_mask_n_enabled_internal() argument
81 if (enabled) { in irq_set_mask_n_enabled_internal()
92 if (enabled) { in irq_set_mask_n_enabled_internal()
100 if (enabled) { in irq_set_mask_n_enabled_internal()
109 void irq_set_mask_enabled(uint32_t mask, bool enabled) { in irq_set_mask_enabled() argument
110 irq_set_mask_n_enabled_internal(0, mask, enabled); in irq_set_mask_enabled()
113 void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled) { in irq_set_mask_n_enabled() argument
114 irq_set_mask_n_enabled_internal(n, mask, enabled); in irq_set_mask_n_enabled()
/hal_rpi_pico-latest/src/rp2_common/hardware_gpio/include/hardware/
Dgpio.h381 void gpio_set_input_enabled(uint gpio, bool enabled);
395 void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled);
466 void gpio_set_irq_enabled(uint gpio, uint32_t event_mask, bool enabled);
525 void gpio_set_irq_enabled_with_callback(uint gpio, uint32_t event_mask, bool enabled, gpio_irq_call…
537 void gpio_set_dormant_irq_enabled(uint gpio, uint32_t event_mask, bool enabled);
1426 static inline bool enabled() { return false; } \
1428 #define CU_SELECT_DEBUG_PINS(x) template<> inline bool __debug_pin_settings<x>::enabled() { return …
1429 #define DEBUG_PINS_ENABLED(p) (__debug_pin_settings<p>::enabled())
/hal_rpi_pico-latest/src/rp2_common/hardware_adc/include/hardware/
Dadc.h310 static inline void adc_irq_set_enabled(bool enabled) { in adc_irq_set_enabled() argument
311 adc_hw->inte = !!enabled; in adc_irq_set_enabled()
/hal_rpi_pico-latest/src/host/pico_stdio/include/pico/
Dstdio.h18 static inline void stdio_set_translate_crlf(stdio_driver_t *driver, bool enabled) {} in stdio_set_translate_crlf() argument
/hal_rpi_pico-latest/src/rp2_common/pico_stdio/
Dstdio.c267 void stdio_set_translate_crlf(stdio_driver_t *driver, bool enabled) { in stdio_set_translate_crlf() argument
269 if (enabled && !driver->crlf_enabled) { in stdio_set_translate_crlf()
272 driver->crlf_enabled = enabled; in stdio_set_translate_crlf()
276 (void)enabled; in stdio_set_translate_crlf()
/hal_rpi_pico-latest/src/rp2_common/pico_cyw43_driver/
Dcyw43_driver.c35 static void cyw43_set_irq_enabled(bool enabled) { in cyw43_set_irq_enabled() argument
36 gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, enabled); in cyw43_set_irq_enabled()
/hal_rpi_pico-latest/src/rp2_common/pico_stdio/include/pico/
Dstdio.h108 void stdio_set_driver_enabled(stdio_driver_t *driver, bool enabled);
/hal_rpi_pico-latest/src/rp2_common/hardware_uart/
Duart.c199 void uart_set_fifo_enabled(uart_inst_t *uart, bool enabled) { in uart_set_fifo_enabled() argument
203 if (enabled) { in uart_set_fifo_enabled()
/hal_rpi_pico-latest/src/rp2_common/pico_standard_link/
DBUILD.bazel24 # When PICO_BARE_METAL is enabled, don't automagically add link-time
/hal_rpi_pico-latest/src/host/hardware_gpio/
Dgpio.c46 void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled){ in gpio_set_input_hysteresis_enabled() argument
/hal_rpi_pico-latest/src/host/hardware_gpio/include/hardware/
Dgpio.h72 void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled);
/hal_rpi_pico-latest/src/rp2040/hardware_structs/include/hardware/structs/
Dclocks.h476 io_ro_32 enabled[2];
/hal_rpi_pico-latest/src/rp2350/hardware_structs/include/hardware/structs/
Dclocks.h552 io_ro_32 enabled[2];
/hal_rpi_pico-latest/src/rp2_common/pico_cyw43_arch/
DBUILD.bazel35 # Tuple is async_context type and whether or not lwip is enabled.
/hal_rpi_pico-latest/src/rp2_common/pico_btstack/
DBUILD.bazel5 # Prefer using this target to link in all the enabled bt modules, as it will
/hal_rpi_pico-latest/src/rp2_common/pico_stdio_usb/
Dstdio_usb.c294 #warning stdio USB was configured along with user use of TinyUSB device mode, but CDC is not enabled

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