Searched refs:clocks_hw (Results 1 – 5 of 5) sorted by relevance
52 clocks_hw->resus.ctrl = 0; in runtime_init_clocks()58 hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS); in runtime_init_clocks()59 while (clocks_hw->clk[clk_sys].selected != 0x1) in runtime_init_clocks()61 hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS); in runtime_init_clocks()62 while (clocks_hw->clk[clk_ref].selected != 0x1) in runtime_init_clocks()
34 clock_hw_t *clock_hw = &clocks_hw->clk[clock]; in clock_stop()41 clock_hw_t *clock_hw = &clocks_hw->clk[clock]; in clock_configure_internal()134 fc_hw_t *fc = &clocks_hw->fc0; in frequency_count_khz()175 assert(clocks_hw->resus.status & CLOCKS_CLK_SYS_RESUS_STATUS_RESUSSED_BITS); in clocks_handle_resus()178 hw_set_bits(&clocks_hw->resus.ctrl, CLOCKS_CLK_SYS_RESUS_CTRL_CLEAR_BITS); in clocks_handle_resus()179 hw_clear_bits(&clocks_hw->resus.ctrl, CLOCKS_CLK_SYS_RESUS_CTRL_CLEAR_BITS); in clocks_handle_resus()182 assert(!(clocks_hw->resus.status & CLOCKS_CLK_SYS_RESUS_STATUS_RESUSSED_BITS)); in clocks_handle_resus()193 uint32_t ints = clocks_hw->ints; in clocks_irq_handler()218 clocks_hw->inte = CLOCKS_INTE_CLK_SYS_RESUS_BITS; in clocks_enable_resus()228 clocks_hw->resus.ctrl = CLOCKS_CLK_SYS_RESUS_CTRL_ENABLE_BITS | timeout; in clocks_enable_resus()[all …]
500 #define clocks_hw ((clocks_hw_t *)CLOCKS_BASE) macro
576 #define clocks_hw ((clocks_hw_t *)CLOCKS_BASE) macro
184 …((clocks_hw->clk[clk_sys].ctrl & CLOCKS_CLK_SYS_CTRL_AUXSRC_BITS) != (CLOCKS_CLK_SYS_CTRL_AUXSRC_V… in capture_additional_rosc_samples()
