Searched refs:clk_sys (Results 1 – 9 of 9) sorted by relevance
58 hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS); in runtime_init_clocks()59 while (clocks_hw->clk[clk_sys].selected != 0x1) in runtime_init_clocks()90 clock_configure_undivided(clk_sys, in runtime_init_clocks()
30 return clock == clk_sys || clock == clk_ref; in has_glitchless_mux()68 uint delay_cyc = configured_freq[clk_sys] / configured_freq[clock] + 1; in clock_configure_internal()169 clock_configure_undivided(clk_sys, in clocks_handle_resus()336 clock_configure_undivided(clk_sys, in set_sys_clock_48mhz()368 clock_configure_undivided(clk_sys, in set_sys_clock_pll()384 clock_configure_undivided(clk_sys, in set_sys_clock_pll()
43 SystemCoreClock = clock_get_hz(clk_sys); in SystemCoreClockUpdate()
36 clk_sys = 5, ///< Select CLK_SYS as clock source enumerator
184 …((clocks_hw->clk[clk_sys].ctrl & CLOCKS_CLK_SYS_CTRL_AUXSRC_BITS) != (CLOCKS_CLK_SYS_CTRL_AUXSRC_V… in capture_additional_rosc_samples()
65 uint freq_in = clock_get_hz(clk_sys); in i2c_set_baudrate()
189 uint32_t cycles = ns * (clock_get_hz(clk_sys) >> 16u) / (1000000000u >> 16u); in ns_delay()
