Searched refs:clk (Results 1 – 5 of 5) sorted by relevance
58 hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS); in runtime_init_clocks()59 while (clocks_hw->clk[clk_sys].selected != 0x1) in runtime_init_clocks()61 hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS); in runtime_init_clocks()62 while (clocks_hw->clk[clk_ref].selected != 0x1) in runtime_init_clocks()
15 check_hw_layout(clocks_hw_t, clk[clk_adc].selected, CLOCKS_CLK_ADC_SELECTED_OFFSET);34 clock_hw_t *clock_hw = &clocks_hw->clk[clock]; in clock_stop()41 clock_hw_t *clock_hw = &clocks_hw->clk[clock]; in clock_configure_internal()250 clocks_hw->clk[gpclk].ctrl = (src << CLOCKS_CLK_GPOUT0_CTRL_AUXSRC_LSB) | in clock_gpio_init_int_frac16()253 …clocks_hw->clk[gpclk].div = (div_int << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) | (div_frac16 << CLOCKS_CLK… in clock_gpio_init_int_frac16()255 …clocks_hw->clk[gpclk].div = (div_int << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) | ((div_frac16>>8u) << CLOC… in clock_gpio_init_int_frac16()
188 clock_hw_t clk[10]; member
204 clock_hw_t clk[10]; member
184 …((clocks_hw->clk[clk_sys].ctrl & CLOCKS_CLK_SYS_CTRL_AUXSRC_BITS) != (CLOCKS_CLK_SYS_CTRL_AUXSRC_V… in capture_additional_rosc_samples()
