1 /********************************************************************* 2 * SEGGER Microcontroller GmbH * 3 * The Embedded Experts * 4 ********************************************************************** 5 * * 6 * (c) 1995 - 2021 SEGGER Microcontroller GmbH * 7 * * 8 * www.segger.com Support: support@segger.com * 9 * * 10 ********************************************************************** 11 * * 12 * SEGGER RTT * Real Time Transfer for embedded targets * 13 * * 14 ********************************************************************** 15 * * 16 * All rights reserved. * 17 * * 18 * SEGGER strongly recommends to not make any changes * 19 * to or modify the source code of this software in order to stay * 20 * compatible with the RTT protocol and J-Link. * 21 * * 22 * Redistribution and use in source and binary forms, with or * 23 * without modification, are permitted provided that the following * 24 * condition is met: * 25 * * 26 * o Redistributions of source code must retain the above copyright * 27 * notice, this condition and the following disclaimer. * 28 * * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 30 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 31 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 33 * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * 34 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 36 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 38 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 40 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 41 * DAMAGE. * 42 * * 43 ********************************************************************** 44 * * 45 * RTT version: 7.88c * 46 * * 47 ********************************************************************** 48 49 ---------------------------END-OF-HEADER------------------------------ 50 File : SEGGER_RTT.h 51 Purpose : Implementation of SEGGER real-time transfer which allows 52 real-time communication on targets which support debugger 53 memory accesses while the CPU is running. 54 Revision: $Rev: 25842 $ 55 ---------------------------------------------------------------------- 56 */ 57 58 #ifndef SEGGER_RTT_H 59 #define SEGGER_RTT_H 60 61 #include "../Config/SEGGER_RTT_Conf.h" 62 63 /********************************************************************* 64 * 65 * Defines, defaults 66 * 67 ********************************************************************** 68 */ 69 70 #ifndef RTT_USE_ASM 71 // 72 // Some cores support out-of-order memory accesses (reordering of memory accesses in the core) 73 // For such cores, we need to define a memory barrier to guarantee the order of certain accesses to the RTT ring buffers. 74 // Needed for: 75 // Cortex-M7 (ARMv7-M) 76 // Cortex-M23 (ARM-v8M) 77 // Cortex-M33 (ARM-v8M) 78 // Cortex-A/R (ARM-v7A/R) 79 // 80 // We do not explicitly check for "Embedded Studio" as the compiler in use determines what we support. 81 // You can use an external toolchain like IAR inside ES. So there is no point in checking for "Embedded Studio" 82 // 83 #if (defined __CROSSWORKS_ARM) // Rowley Crossworks 84 #define _CC_HAS_RTT_ASM_SUPPORT 1 85 #if (defined __ARM_ARCH_7M__) // Cortex-M3 86 #define _CORE_HAS_RTT_ASM_SUPPORT 1 87 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 88 #define _CORE_HAS_RTT_ASM_SUPPORT 1 89 #define _CORE_NEEDS_DMB 1 90 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 91 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 92 #define _CORE_HAS_RTT_ASM_SUPPORT 0 93 #define _CORE_NEEDS_DMB 1 94 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 95 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 96 #define _CORE_HAS_RTT_ASM_SUPPORT 1 97 #define _CORE_NEEDS_DMB 1 98 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 99 #else 100 #define _CORE_HAS_RTT_ASM_SUPPORT 0 101 #endif 102 #elif (defined __ARMCC_VERSION) 103 // 104 // ARM compiler 105 // ARM compiler V6.0 and later is clang based. 106 // Our ASM part is compatible to clang. 107 // 108 #if (__ARMCC_VERSION >= 6000000) 109 #define _CC_HAS_RTT_ASM_SUPPORT 1 110 #else 111 #define _CC_HAS_RTT_ASM_SUPPORT 0 112 #endif 113 #if (defined __ARM_ARCH_6M__) // Cortex-M0 / M1 114 #define _CORE_HAS_RTT_ASM_SUPPORT 0 // No ASM support for this architecture 115 #elif (defined __ARM_ARCH_7M__) // Cortex-M3 116 #define _CORE_HAS_RTT_ASM_SUPPORT 1 117 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 118 #define _CORE_HAS_RTT_ASM_SUPPORT 1 119 #define _CORE_NEEDS_DMB 1 120 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 121 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 122 #define _CORE_HAS_RTT_ASM_SUPPORT 0 123 #define _CORE_NEEDS_DMB 1 124 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 125 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 126 #define _CORE_HAS_RTT_ASM_SUPPORT 1 127 #define _CORE_NEEDS_DMB 1 128 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 129 #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R 130 #define _CORE_NEEDS_DMB 1 131 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 132 #else 133 #define _CORE_HAS_RTT_ASM_SUPPORT 0 134 #endif 135 #elif ((defined __GNUC__) || (defined __clang__)) 136 // 137 // GCC / Clang 138 // 139 #define _CC_HAS_RTT_ASM_SUPPORT 1 140 // ARM 7/9: __ARM_ARCH_5__ / __ARM_ARCH_5E__ / __ARM_ARCH_5T__ / __ARM_ARCH_5T__ / __ARM_ARCH_5TE__ 141 #if (defined __ARM_ARCH_7M__) // Cortex-M3 142 #define _CORE_HAS_RTT_ASM_SUPPORT 1 143 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 144 #define _CORE_HAS_RTT_ASM_SUPPORT 1 145 #define _CORE_NEEDS_DMB 1 // Only Cortex-M7 needs a DMB but we cannot distinguish M4 and M7 here... 146 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 147 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 148 #define _CORE_HAS_RTT_ASM_SUPPORT 0 149 #define _CORE_NEEDS_DMB 1 150 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 151 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 152 #define _CORE_HAS_RTT_ASM_SUPPORT 1 153 #define _CORE_NEEDS_DMB 1 154 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 155 #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R 156 #define _CORE_NEEDS_DMB 1 157 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 158 #else 159 #define _CORE_HAS_RTT_ASM_SUPPORT 0 160 #endif 161 #elif ((defined __IASMARM__) || (defined __ICCARM__)) 162 // 163 // IAR assembler/compiler 164 // 165 #define _CC_HAS_RTT_ASM_SUPPORT 1 166 #if (__VER__ < 6300000) 167 #define VOLATILE 168 #else 169 #define VOLATILE volatile 170 #endif 171 #if (defined __ARM7M__) // Needed for old versions that do not know the define yet 172 #if (__CORE__ == __ARM7M__) // Cortex-M3 173 #define _CORE_HAS_RTT_ASM_SUPPORT 1 174 #endif 175 #endif 176 #if (defined __ARM7EM__) 177 #if (__CORE__ == __ARM7EM__) // Cortex-M4/M7 178 #define _CORE_HAS_RTT_ASM_SUPPORT 1 179 #define _CORE_NEEDS_DMB 1 180 #define RTT__DMB() asm VOLATILE ("DMB"); 181 #endif 182 #endif 183 #if (defined __ARM8M_BASELINE__) 184 #if (__CORE__ == __ARM8M_BASELINE__) // Cortex-M23 185 #define _CORE_HAS_RTT_ASM_SUPPORT 0 186 #define _CORE_NEEDS_DMB 1 187 #define RTT__DMB() asm VOLATILE ("DMB"); 188 #endif 189 #endif 190 #if (defined __ARM8M_MAINLINE__) 191 #if (__CORE__ == __ARM8M_MAINLINE__) // Cortex-M33 192 #define _CORE_HAS_RTT_ASM_SUPPORT 1 193 #define _CORE_NEEDS_DMB 1 194 #define RTT__DMB() asm VOLATILE ("DMB"); 195 #endif 196 #endif 197 #if (defined __ARM8EM_MAINLINE__) 198 #if (__CORE__ == __ARM8EM_MAINLINE__) // Cortex-??? 199 #define _CORE_HAS_RTT_ASM_SUPPORT 1 200 #define _CORE_NEEDS_DMB 1 201 #define RTT__DMB() asm VOLATILE ("DMB"); 202 #endif 203 #endif 204 #if (defined __ARM7A__) 205 #if (__CORE__ == __ARM7A__) // Cortex-A 32-bit ARMv7-A 206 #define _CORE_NEEDS_DMB 1 207 #define RTT__DMB() asm VOLATILE ("DMB"); 208 #endif 209 #endif 210 #if (defined __ARM7R__) 211 #if (__CORE__ == __ARM7R__) // Cortex-R 32-bit ARMv7-R 212 #define _CORE_NEEDS_DMB 1 213 #define RTT__DMB() asm VOLATILE ("DMB"); 214 #endif 215 #endif 216 // TBD: __ARM8A__ => Cortex-A 64-bit ARMv8-A 217 // TBD: __ARM8R__ => Cortex-R 64-bit ARMv8-R 218 #else 219 // 220 // Other compilers 221 // 222 #define _CC_HAS_RTT_ASM_SUPPORT 0 223 #define _CORE_HAS_RTT_ASM_SUPPORT 0 224 #endif 225 // 226 // If IDE and core support the ASM version, enable ASM version by default 227 // 228 #ifndef _CORE_HAS_RTT_ASM_SUPPORT 229 #define _CORE_HAS_RTT_ASM_SUPPORT 0 // Default for unknown cores 230 #endif 231 #if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT) 232 #define RTT_USE_ASM (1) 233 #else 234 #define RTT_USE_ASM (0) 235 #endif 236 #endif 237 238 #ifndef _CORE_NEEDS_DMB 239 #define _CORE_NEEDS_DMB 0 240 #endif 241 242 #ifndef RTT__DMB 243 #if _CORE_NEEDS_DMB 244 #error "Don't know how to place inline assembly for DMB" 245 #else 246 #define RTT__DMB() 247 #endif 248 #endif 249 250 #ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE 251 #define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0) // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here 252 #endif 253 254 #ifndef SEGGER_RTT_UNCACHED_OFF 255 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE 256 #error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" 257 #else 258 #define SEGGER_RTT_UNCACHED_OFF (0) 259 #endif 260 #endif 261 #if RTT_USE_ASM 262 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE 263 #error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" 264 #endif 265 #endif 266 267 #ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file 268 #include <stdlib.h> 269 #include <stdarg.h> 270 271 /********************************************************************* 272 * 273 * Defines, fixed 274 * 275 ********************************************************************** 276 */ 277 278 // 279 // Determine how much we must pad the control block to make it a multiple of a cache line in size 280 // Assuming: U8 = 1B 281 // U16 = 2B 282 // U32 = 4B 283 // U8/U16/U32* = 4B 284 // 285 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE // Avoid division by zero in case we do not have any cache 286 #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE) 287 #else 288 #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes) 289 #endif 290 #define SEGGER_RTT__CB_SIZE (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24)) 291 #define SEGGER_RTT__CB_PADDING (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE) 292 293 /********************************************************************* 294 * 295 * Types 296 * 297 ********************************************************************** 298 */ 299 300 // 301 // Description for a circular buffer (also called "ring buffer") 302 // which is used as up-buffer (T->H) 303 // 304 typedef struct { 305 const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4" 306 char* pBuffer; // Pointer to start of buffer 307 unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. 308 unsigned WrOff; // Position of next item to be written by either target. 309 volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host. 310 unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. 311 } SEGGER_RTT_BUFFER_UP; 312 313 // 314 // Description for a circular buffer (also called "ring buffer") 315 // which is used as down-buffer (H->T) 316 // 317 typedef struct { 318 const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4" 319 char* pBuffer; // Pointer to start of buffer 320 unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. 321 volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host. 322 unsigned RdOff; // Position of next item to be read by target (down-buffer). 323 unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. 324 } SEGGER_RTT_BUFFER_DOWN; 325 326 // 327 // RTT control block which describes the number of buffers available 328 // as well as the configuration for each buffer 329 // 330 // 331 typedef struct { 332 char acID[16]; // Initialized to "SEGGER RTT" 333 int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2) 334 int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2) 335 SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host 336 SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target 337 #if SEGGER_RTT__CB_PADDING 338 unsigned char aDummy[SEGGER_RTT__CB_PADDING]; 339 #endif 340 } SEGGER_RTT_CB; 341 342 /********************************************************************* 343 * 344 * Global data 345 * 346 ********************************************************************** 347 */ 348 extern SEGGER_RTT_CB _SEGGER_RTT; 349 350 /********************************************************************* 351 * 352 * RTT API functions 353 * 354 ********************************************************************** 355 */ 356 #ifdef __cplusplus 357 extern "C" { 358 #endif 359 int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 360 int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 361 int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 362 int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 363 int SEGGER_RTT_GetKey (void); 364 unsigned SEGGER_RTT_HasData (unsigned BufferIndex); 365 int SEGGER_RTT_HasKey (void); 366 unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex); 367 void SEGGER_RTT_Init (void); 368 unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize); 369 unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize); 370 int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName); 371 int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName); 372 int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags); 373 int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags); 374 int SEGGER_RTT_WaitKey (void); 375 unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 376 unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 377 unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 378 unsigned SEGGER_RTT_ASM_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 379 unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s); 380 void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 381 unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c); 382 unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c); 383 unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c); 384 unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex); 385 unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex); 386 // 387 // Function macro for performance optimization 388 // 389 #define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) 390 391 #if RTT_USE_ASM 392 #define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock 393 #endif 394 395 /********************************************************************* 396 * 397 * RTT transfer functions to send RTT data via other channels. 398 * 399 ********************************************************************** 400 */ 401 unsigned SEGGER_RTT_ReadUpBuffer (unsigned BufferIndex, void* pBuffer, unsigned BufferSize); 402 unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize); 403 unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 404 unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 405 406 #define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly 407 408 /********************************************************************* 409 * 410 * RTT "Terminal" API functions 411 * 412 ********************************************************************** 413 */ 414 int SEGGER_RTT_SetTerminal (unsigned char TerminalId); 415 int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s); 416 417 /********************************************************************* 418 * 419 * RTT printf functions (require SEGGER_RTT_printf.c) 420 * 421 ********************************************************************** 422 */ 423 int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...); 424 int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList); 425 426 #ifdef __cplusplus 427 } 428 #endif 429 430 #endif // ifndef(SEGGER_RTT_ASM) 431 432 /********************************************************************* 433 * 434 * Defines 435 * 436 ********************************************************************** 437 */ 438 439 // 440 // Operating modes. Define behavior if buffer is full (not enough space for entire message) 441 // 442 #define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default) 443 #define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits. 444 #define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer. 445 #define SEGGER_RTT_MODE_MASK (3) 446 447 // 448 // Control sequences, based on ANSI. 449 // Can be used to control color, and clear the screen 450 // 451 #define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors 452 #define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left 453 454 #define RTT_CTRL_TEXT_BLACK "\x1B[2;30m" 455 #define RTT_CTRL_TEXT_RED "\x1B[2;31m" 456 #define RTT_CTRL_TEXT_GREEN "\x1B[2;32m" 457 #define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m" 458 #define RTT_CTRL_TEXT_BLUE "\x1B[2;34m" 459 #define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m" 460 #define RTT_CTRL_TEXT_CYAN "\x1B[2;36m" 461 #define RTT_CTRL_TEXT_WHITE "\x1B[2;37m" 462 463 #define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m" 464 #define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m" 465 #define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m" 466 #define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m" 467 #define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m" 468 #define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m" 469 #define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m" 470 #define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m" 471 472 #define RTT_CTRL_BG_BLACK "\x1B[24;40m" 473 #define RTT_CTRL_BG_RED "\x1B[24;41m" 474 #define RTT_CTRL_BG_GREEN "\x1B[24;42m" 475 #define RTT_CTRL_BG_YELLOW "\x1B[24;43m" 476 #define RTT_CTRL_BG_BLUE "\x1B[24;44m" 477 #define RTT_CTRL_BG_MAGENTA "\x1B[24;45m" 478 #define RTT_CTRL_BG_CYAN "\x1B[24;46m" 479 #define RTT_CTRL_BG_WHITE "\x1B[24;47m" 480 481 #define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m" 482 #define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m" 483 #define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m" 484 #define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m" 485 #define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m" 486 #define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m" 487 #define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m" 488 #define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m" 489 490 491 #endif 492 493 /*************************** End of file ****************************/ 494
