1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /** 4 * Copyright (c) 2024 Raspberry Pi Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 // ============================================================================= 9 // Register block : SYSINFO 10 // Version : 1 11 // Bus type : apb 12 // ============================================================================= 13 #ifndef _HARDWARE_REGS_SYSINFO_H 14 #define _HARDWARE_REGS_SYSINFO_H 15 // ============================================================================= 16 // Register : SYSINFO_CHIP_ID 17 // Description : JEDEC JEP-106 compliant chip identifier. 18 #define SYSINFO_CHIP_ID_OFFSET _u(0x00000000) 19 #define SYSINFO_CHIP_ID_BITS _u(0xffffffff) 20 #define SYSINFO_CHIP_ID_RESET _u(0x00000000) 21 // ----------------------------------------------------------------------------- 22 // Field : SYSINFO_CHIP_ID_REVISION 23 #define SYSINFO_CHIP_ID_REVISION_RESET "-" 24 #define SYSINFO_CHIP_ID_REVISION_BITS _u(0xf0000000) 25 #define SYSINFO_CHIP_ID_REVISION_MSB _u(31) 26 #define SYSINFO_CHIP_ID_REVISION_LSB _u(28) 27 #define SYSINFO_CHIP_ID_REVISION_ACCESS "RO" 28 // ----------------------------------------------------------------------------- 29 // Field : SYSINFO_CHIP_ID_PART 30 #define SYSINFO_CHIP_ID_PART_RESET "-" 31 #define SYSINFO_CHIP_ID_PART_BITS _u(0x0ffff000) 32 #define SYSINFO_CHIP_ID_PART_MSB _u(27) 33 #define SYSINFO_CHIP_ID_PART_LSB _u(12) 34 #define SYSINFO_CHIP_ID_PART_ACCESS "RO" 35 // ----------------------------------------------------------------------------- 36 // Field : SYSINFO_CHIP_ID_MANUFACTURER 37 #define SYSINFO_CHIP_ID_MANUFACTURER_RESET "-" 38 #define SYSINFO_CHIP_ID_MANUFACTURER_BITS _u(0x00000fff) 39 #define SYSINFO_CHIP_ID_MANUFACTURER_MSB _u(11) 40 #define SYSINFO_CHIP_ID_MANUFACTURER_LSB _u(0) 41 #define SYSINFO_CHIP_ID_MANUFACTURER_ACCESS "RO" 42 // ============================================================================= 43 // Register : SYSINFO_PLATFORM 44 // Description : Platform register. Allows software to know what environment it 45 // is running in. 46 #define SYSINFO_PLATFORM_OFFSET _u(0x00000004) 47 #define SYSINFO_PLATFORM_BITS _u(0x00000003) 48 #define SYSINFO_PLATFORM_RESET _u(0x00000000) 49 // ----------------------------------------------------------------------------- 50 // Field : SYSINFO_PLATFORM_ASIC 51 #define SYSINFO_PLATFORM_ASIC_RESET _u(0x0) 52 #define SYSINFO_PLATFORM_ASIC_BITS _u(0x00000002) 53 #define SYSINFO_PLATFORM_ASIC_MSB _u(1) 54 #define SYSINFO_PLATFORM_ASIC_LSB _u(1) 55 #define SYSINFO_PLATFORM_ASIC_ACCESS "RO" 56 // ----------------------------------------------------------------------------- 57 // Field : SYSINFO_PLATFORM_FPGA 58 #define SYSINFO_PLATFORM_FPGA_RESET _u(0x0) 59 #define SYSINFO_PLATFORM_FPGA_BITS _u(0x00000001) 60 #define SYSINFO_PLATFORM_FPGA_MSB _u(0) 61 #define SYSINFO_PLATFORM_FPGA_LSB _u(0) 62 #define SYSINFO_PLATFORM_FPGA_ACCESS "RO" 63 // ============================================================================= 64 // Register : SYSINFO_GITREF_RP2040 65 // Description : Git hash of the chip source. Used to identify chip version. 66 #define SYSINFO_GITREF_RP2040_OFFSET _u(0x00000010) 67 #define SYSINFO_GITREF_RP2040_BITS _u(0xffffffff) 68 #define SYSINFO_GITREF_RP2040_RESET "-" 69 #define SYSINFO_GITREF_RP2040_MSB _u(31) 70 #define SYSINFO_GITREF_RP2040_LSB _u(0) 71 #define SYSINFO_GITREF_RP2040_ACCESS "RO" 72 // ============================================================================= 73 #endif // _HARDWARE_REGS_SYSINFO_H 74 75
