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Searched refs:SCB_SHCSR_MEMFAULTENA_Msk (Results 1 – 5 of 5) sorted by relevance

/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Core/Include/
Dmpu_armv8.h134 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable()
135 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
146 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable()
147 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
162 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable_NS()
163 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
174 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable_NS()
175 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()
Dmpu_armv7.h195 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable()
196 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
207 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable()
208 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
Dcore_cm33.h714 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB … macro
/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Core/Include/m-profile/
Darmv8m_mpu.h203 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable()
204 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
215 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable()
216 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
231 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable_NS()
232 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
243 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable_NS()
244 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()
Darmv7m_mpu.h193 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable()
194 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
205 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable()
206 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()