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Searched refs:SCB_NS (Results 1 – 3 of 3) sorted by relevance

/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Core/Include/
Dmpu_armv8.h163 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
175 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()
Dcore_cm33.h2080 …#define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration stru… macro
2709 …reg_value = SCB_NS->AIRCR; /* read old register c… in TZ_NVIC_SetPriorityGrouping_NS()
2714 SCB_NS->AIRCR = reg_value; in TZ_NVIC_SetPriorityGrouping_NS()
2725 return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); in TZ_NVIC_GetPriorityGrouping_NS()
2869 …SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (… in TZ_NVIC_SetPriority_NS()
2891 return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); in TZ_NVIC_GetPriority_NS()
/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Core/Include/m-profile/
Darmv8m_mpu.h232 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
244 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()