Searched refs:PIO_SM0_PINCTRL_SET_BASE_LSB (Results 1 – 4 of 4) sorted by relevance
233 (base << PIO_SM0_PINCTRL_SET_BASE_LSB); in pio_sm_set_pins_internal()271 (base << PIO_SM0_PINCTRL_SET_BASE_LSB); in pio_sm_set_pins_with_mask_internal()308 (base << PIO_SM0_PINCTRL_SET_BASE_LSB); in pio_sm_set_pindirs_with_mask_internal()344 …io->sm[sm].pinctrl = (5u << PIO_SM0_PINCTRL_SET_COUNT_LSB) | (pin << PIO_SM0_PINCTRL_SET_BASE_LSB); in pio_sm_set_consecutive_pindirs()349 …>sm[sm].pinctrl = (count << PIO_SM0_PINCTRL_SET_COUNT_LSB) | (pin << PIO_SM0_PINCTRL_SET_BASE_LSB); in pio_sm_set_consecutive_pindirs()
286 … (1u << PIO_SM0_PINCTRL_SET_BASE_LSB) | (1u << PIO_SM0_PINCTRL_SIDESET_BASE_LSB))291 … (1u << PIO_SM0_PINCTRL_SET_BASE_LSB) | (1u << PIO_SM0_PINCTRL_SIDESET_BASE_LSB))383 ((set_base & 31) << PIO_SM0_PINCTRL_SET_BASE_LSB); in sm_config_set_set_pin_base()385 c->pinhi = (c->pinhi & ~(31u << PIO_SM0_PINCTRL_SET_BASE_LSB)) | in sm_config_set_set_pin_base()386 ((set_base >> 4) << PIO_SM0_PINCTRL_SET_BASE_LSB); in sm_config_set_set_pin_base()1519 (set_base << PIO_SM0_PINCTRL_SET_BASE_LSB) | in pio_sm_set_set_pins()
1040 #define PIO_SM0_PINCTRL_SET_BASE_LSB _u(5) macro
1206 #define PIO_SM0_PINCTRL_SET_BASE_LSB _u(5) macro
