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Searched refs:ICIMVAU (Results 1 – 2 of 2) sorted by relevance

/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Core/Include/m-profile/
Darmv7m_cachel1.h123 …SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..… in SCB_InvalidateICache_by_Addr()
/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Core/Include/
Dcore_cm33.h560 …__OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU … member