Searched refs:__ASM (Results 1 – 6 of 6) sorted by relevance
| /hal_rpi_pico-3.7.0-3.6.0-3.5.0/src/rp2_common/cmsis/stub/CMSIS/Core/Include/ |
| D | cmsis_gcc.h | 40 #ifndef __ASM
41 #define __ASM __asm macro
117 #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
198 __ASM volatile ("cpsie i" : : : "memory"); in __enable_irq()
209 __ASM volatile ("cpsid i" : : : "memory"); in __disable_irq()
222 __ASM volatile ("MRS %0, control" : "=r" (result) ); in __get_CONTROL()
237 __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); in __TZ_get_CONTROL_NS()
250 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); in __set_CONTROL()
262 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); in __TZ_set_CONTROL_NS()
276 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); in __get_IPSR()
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| D | cmsis_armclang_ltm.h | 37 #ifndef __ASM
38 #define __ASM __asm macro
114 #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
171 __ASM volatile ("MRS %0, control" : "=r" (result) ); in __get_CONTROL()
186 __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); in __TZ_get_CONTROL_NS()
199 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); in __set_CONTROL()
211 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); in __TZ_set_CONTROL_NS()
225 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); in __get_IPSR()
239 __ASM volatile ("MRS %0, apsr" : "=r" (result) ); in __get_APSR()
253 __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); in __get_xPSR()
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| D | cmsis_armclang.h | 37 #ifndef __ASM
38 #define __ASM __asm macro
114 #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
170 __ASM volatile ("MRS %0, control" : "=r" (result) ); in __get_CONTROL()
185 __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); in __TZ_get_CONTROL_NS()
198 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); in __set_CONTROL()
210 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); in __TZ_set_CONTROL_NS()
224 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); in __get_IPSR()
238 __ASM volatile ("MRS %0, apsr" : "=r" (result) ); in __get_APSR()
252 __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); in __get_xPSR()
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| D | cmsis_armcc.h | 57 #ifndef __ASM
58 #define __ASM __asm macro
162 register uint32_t __regControl __ASM("control"); in __get_CONTROL()
174 register uint32_t __regControl __ASM("control"); in __set_CONTROL()
186 register uint32_t __regIPSR __ASM("ipsr"); in __get_IPSR()
198 register uint32_t __regAPSR __ASM("apsr"); in __get_APSR()
210 register uint32_t __regXPSR __ASM("xpsr"); in __get_xPSR()
222 register uint32_t __regProcessStackPointer __ASM("psp"); in __get_PSP()
234 register uint32_t __regProcessStackPointer __ASM("psp"); in __set_PSP()
246 register uint32_t __regMainStackPointer __ASM("msp"); in __get_MSP()
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| D | cmsis_iccarm.h | 112 #ifndef __ASM
113 #define __ASM __asm macro
117 #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
601 __ASM volatile("RRX %0, %1" : "=r"(result) : "r" (value)); in __RRX()
840 __ASM volatile ("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); in __LDRBT()
847 __ASM volatile ("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); in __LDRHT()
854 __ASM volatile ("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); in __LDRT()
860 __ASM volatile ("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); in __STRBT()
865 __ASM volatile ("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); in __STRHT()
870 __ASM volatile ("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); in __STRT()
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| D | cmsis_compiler.h | 70 #ifndef __ASM
71 #define __ASM __asm macro
142 #ifndef __ASM
143 #define __ASM __asm macro
211 #ifndef __ASM
212 #define __ASM _asm macro
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