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Searched refs:M0PLUS_NVIC_ISER_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_rpi_pico-3.7.0-3.6.0-3.5.0/src/rp2040/hardware_structs/include/hardware/structs/
Dnvic.h24 _REG_(M0PLUS_NVIC_ISER_OFFSET) // M0PLUS_NVIC_ISER
63 #define nvic_hw ((nvic_hw_t *)(PPB_BASE + M0PLUS_NVIC_ISER_OFFSET))
/hal_rpi_pico-3.7.0-3.6.0-3.5.0/src/rp2_common/hardware_irq/
Dirq.c56 return 0 != ((1u << num) & *((io_rw_32 *) (PPB_BASE + M0PLUS_NVIC_ISER_OFFSET))); in pico_irq_is_enabled()
64 *((io_rw_32 *) (PPB_BASE + M0PLUS_NVIC_ISER_OFFSET)) = mask; in irq_set_mask_enabled()
/hal_rpi_pico-3.7.0-3.6.0-3.5.0/src/rp2040/hardware_regs/include/hardware/regs/
Dm0plus.h152 #define M0PLUS_NVIC_ISER_OFFSET _u(0x0000e100) macro