Searched refs:setting (Results 1 – 2 of 2) sorted by relevance
38 * Remove the DTC setting override in SCI B UART42 * Remove the DTC setting override in SCI UART46 * Add bug fix for CANFD setting wrong value of acepptance filtering rule number62 * Allows custom implementation of option setting memory
1444 uint32_t setting = SDHI_PRV_CLK_CTRL_DIV_INVALID; in r_sdhi_max_clock_rate_set() local1459 setting = divisor_shift ? ((1U << divisor_shift) >> 2U) : UINT8_MAX; in r_sdhi_max_clock_rate_set()1475 … p_ctrl->p_reg->SD_CLK_CTRL = setting | clkctrlen | SDHI_PRV_SDHI_PRV_SD_CLK_CTRL_CLKEN_MASK; in r_sdhi_max_clock_rate_set()
