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Searched refs:clock_div_ratio (Results 1 – 2 of 2) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/inc/instances/
Dr_glcdc.h165 glcdc_panel_clk_div_t clock_div_ratio; ///< Clock divide ratio for dot clock member
/hal_renesas-latest/drivers/ra/fsp/src/r_glcdc/
Dr_glcdc.c1222 FSP_ERROR_RETURN(0 != pextend->clock_div_ratio, FSP_ERR_CLOCK_GENERATION); in r_glcdc_open_param_check()
1244 uint32_t dcdr = (pextend->clock_div_ratio & GLCDC_PRV_SYSCNT_PANEL_CLK_DCDR_MASK); in r_glcdc_clock_set()