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Searched refs:ccr3 (Results 1 – 2 of 2) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzn/r_sci_uart/
Dr_sci_uart.c1291 uint32_t ccr3 = SCI_UART_CCR3_DEFAULT_VALUE; in r_sci_uart_config_set() local
1294 ccr3 |= (1U << SCI_UART_CCR3_FM_OFFSET); in r_sci_uart_config_set()
1310 ccr3 |= (1U << SCI_UART_CCR3_CHR_OFFSET); in r_sci_uart_config_set()
1314 ccr3 &= ~(1U << (SCI_UART_CCR3_CHR_OFFSET + 1)); in r_sci_uart_config_set()
1322 ccr3 |= (uint32_t) p_cfg->stop_bits << SCI_UART_CCR3_STP_OFFSET; in r_sci_uart_config_set()
1326 ccr3 |= (p_extend->clock & SCI_UART_CCR3_CKE_VALUE_MASK) << SCI_UART_CCR3_CKE_OFFSET; in r_sci_uart_config_set()
1330 ccr3 |= (p_extend->rx_edge_start & 1U) << SCI_UART_CCR3_RxDSEL_OFFSET; in r_sci_uart_config_set()
1332ccr3 |= ((uint32_t) p_extend->rs485_setting.enable << R_SCI0_CCR3_DEN_Pos) & (uint32_t) R_SCI0_CCR… in r_sci_uart_config_set()
1337 ccr3 |= 1U << SCI_UART_CCR3_BPEN_OFFSET; in r_sci_uart_config_set()
1341 p_instance_ctrl->p_reg->CCR3 = ccr3; in r_sci_uart_config_set()
/hal_renesas-latest/drivers/ra/fsp/src/r_sci_b_uart/
Dr_sci_b_uart.c1233 uint32_t ccr3 = (uint32_t) R_SCI_B0_CCR3_LSBF_Msk; in r_sci_b_uart_config_set() local
1234ccr3 |= ((uint32_t) p_cfg->data_bits << SCI_B_UART_CCR3_CHAR_OFFSET) & SCI_B_UART_CCR3_CHAR_MASK; in r_sci_b_uart_config_set()
1235 ccr3 |= ((uint32_t) p_cfg->stop_bits << R_SCI_B0_CCR3_STP_Pos) & R_SCI_B0_CCR3_STP_Msk; in r_sci_b_uart_config_set()
1236ccr3 |= ((uint32_t) p_extend->rx_edge_start << R_SCI_B0_CCR3_RXDESEL_Pos) & R_SCI_B0_CCR3_RXDESEL_… in r_sci_b_uart_config_set()
1237ccr3 |= ((uint32_t) p_extend->rs485_setting.enable << R_SCI_B0_CCR3_DEN_Pos) & R_SCI_B0_CCR3_DEN_M… in r_sci_b_uart_config_set()
1238 ccr3 |= ((uint32_t) p_extend->clock << SCI_B_UART_CCR3_CKE_OFFSET) & SCI_B_UART_CCR3_CKE_MASK; in r_sci_b_uart_config_set()
1242 ccr3 |= (1U << R_SCI_B0_CCR3_FM_Pos) & R_SCI_B0_CCR3_FM_Msk; in r_sci_b_uart_config_set()
1245 p_ctrl->p_reg->CCR3 = ccr3; in r_sci_b_uart_config_set()