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Searched refs:SCKSCR (Results 1 – 21 of 21) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/
Dbsp_clocks.c898 uint32_t clock_index = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKSCR, secure); in SystemCoreClockUpdate()
1096 if (g_clock_freq[clock] >= g_clock_freq[R_SYSTEM->SCKSCR]) in bsp_prv_clock_set()
1137 R_SYSTEM->SCKSCR = (uint8_t) clock; in bsp_prv_clock_set()
1165 R_SYSTEM->SCKSCR = (uint8_t) clock; in bsp_prv_clock_set()
1201 R_SYSTEM->SCKSCR = (uint8_t) clock; in bsp_prv_clock_set()
1521 R_SYSTEM->SCKSCR = BSP_CFG_CLOCK_SOURCE; in bsp_prv_clock_set_hard_reset()
1555 R_SYSTEM->SCKSCR = BSP_CFG_CLOCK_SOURCE; in bsp_prv_clock_set_hard_reset()
1793 uint8_t sckscr = R_SYSTEM->SCKSCR; in bsp_soft_reset_prepare()
/hal_renesas-latest/drivers/ra/fsp/src/r_lpm/
Dr_lpm.c853 uint32_t clock_source = R_SYSTEM->SCKSCR; in r_lpm_low_power_enter()
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h10190 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA2A1AB.h10452 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4E10D.h10049 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4W1AD.h10538 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4M1AB.h10702 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4M2AD.h11038 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4M3AF.h11038 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4E2B9.h11853 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6E10F.h11467 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6M1AD.h11234 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6E2BB.h12057 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6M4AF.h11801 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA4L1BD.h14344 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6M2AF.h13215 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6M3AH.h15873 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA6M5BH.h14063 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA8T1AH.h13661 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA8M1AH.h13696 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member
DR7FA8D1BH.h15285 …__IOM uint8_t SCKSCR; /*!< (@ 0x00000026) System Clock Source Control Register … member