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Searched refs:R_SYSTEM_SCKDIVCR_ICK_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/
Dbsp_clocks.c902 …3_REG32_READ(R_SYSTEM->SCKDIVCR, secure) & R_SYSTEM_SCKDIVCR_ICK_Msk) >> R_SYSTEM_SCKDIVCR_ICK_Pos; in SystemCoreClockUpdate()
1117 (new_div << R_SYSTEM_SCKDIVCR_ICK_Pos); in bsp_prv_clock_set()
1178 if (R_SYSTEM->SCKDIVCR2 == ((current_sckdivcr >> R_SYSTEM_SCKDIVCR_ICK_Pos) & 0xF)) in bsp_prv_clock_set()
1181 uint32_t current_iclk_div = (current_sckdivcr >> R_SYSTEM_SCKDIVCR_ICK_Pos) & 0xF; in bsp_prv_clock_set()
1193 (new_div << R_SYSTEM_SCKDIVCR_ICK_Pos); in bsp_prv_clock_set()
1253 … (0x8 << R_SYSTEM_SCKDIVCR_ICK_Pos)) ? BSP_CLOCKS_SYS_CLOCK_DIV_3 : BSP_CLOCKS_SYS_CLOCK_DIV_2; in bsp_prv_clock_prepare_pre_sleep()
1500 (BSP_CLOCKS_SYS_CLOCK_DIV_2 << R_SYSTEM_SCKDIVCR_ICK_Pos); in bsp_prv_clock_set_hard_reset()
1504 (BSP_CLOCKS_SYS_CLOCK_DIV_4 << R_SYSTEM_SCKDIVCR_ICK_Pos); in bsp_prv_clock_set_hard_reset()
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h17103 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA2A1AB.h18419 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4E10D.h18118 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4W1AD.h18424 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4M1AB.h18692 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4M2AD.h19621 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4M3AF.h19726 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4E2B9.h21377 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6E10F.h20255 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6M1AD.h20505 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6E2BB.h21665 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6M4AF.h22116 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA4L1BD.h24241 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6M2AF.h23489 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6M3AH.h27124 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA6M5BH.h25926 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA8T1AH.h26516 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA8M1AH.h28504 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro
DR7FA8D1BH.h37058 …#define R_SYSTEM_SCKDIVCR_ICK_Pos (24UL) /*!< ICK (Bit 24) … macro