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Searched refs:R_SCI5_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/mcu/rzn2l/
Dbsp_feature.h371 #define BSP_FEATURE_SCI_SAFETY_CHANNEL_BASE_ADDRESS (R_SCI5_BASE)
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h12313 #define R_SCI5_BASE 0x400700A0UL macro
12415 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA2A1AB.h13653 #define R_SCI5_BASE 0x400700A0UL macro
13766 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4E10D.h13515 #define R_SCI5_BASE 0x40118500UL macro
13626 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4W1AD.h13627 #define R_SCI5_BASE 0x400700A0UL macro
13741 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4M1AB.h13790 #define R_SCI5_BASE 0x400700A0UL macro
13905 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4M2AD.h14508 #define R_SCI5_BASE 0x40118500UL macro
14626 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4M3AF.h14611 #define R_SCI5_BASE 0x40118500UL macro
14730 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4E2B9.h15832 #define R_SCI5_BASE 0x40118500UL macro
15952 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6E10F.h14994 #define R_SCI5_BASE 0x40118500UL macro
15111 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6M1AD.h15319 #define R_SCI5_BASE 0x400700A0UL macro
15446 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6E2BB.h16037 #define R_SCI5_BASE 0x40118500UL macro
16158 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6M4AF.h16688 #define R_SCI5_BASE 0x40118500UL macro
16811 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA4L1BD.h17359 #define R_SCI5_BASE 0x40118500UL macro
17488 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6M2AF.h17305 #define R_SCI5_BASE 0x400700A0UL macro
17437 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6M3AH.h19969 #define R_SCI5_BASE 0x400700A0UL macro
20107 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA6M5BH.h19305 #define R_SCI5_BASE 0x40118500UL macro
19430 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA8T1AH.h20151 #define R_SCI5_BASE (0x40358500UL + BASE_NS_OFFSET) macro
20293 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA8M1AH.h22120 #define R_SCI5_BASE (0x40358500UL + BASE_NS_OFFSET) macro
22265 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
DR7FA8D1BH.h29967 #define R_SCI5_BASE (0x40358500UL + BASE_NS_OFFSET) macro
30116 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h30735 #define R_SCI5_BASE 0x81001000UL macro
30855 #define R_SCI5 ((R_SCI0_Type *) R_SCI5_BASE)