Home
last modified time | relevance | path

Searched refs:R_SCI0_SPMR_CTSE_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/src/r_sci_uart/
Dr_sci_uart.c1353 …p_ctrl->p_reg->SPMR = ((uint8_t) (p_extend->flow_control << R_SCI0_SPMR_CTSE_Pos) & R_SCI0_SPMR_CT… in r_sci_uart_config_set()
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h16636 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA2A1AB.h17867 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4E10D.h17651 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4W1AD.h17917 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4M1AB.h18068 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4M2AD.h18800 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4M3AF.h18905 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4E2B9.h20793 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6E10F.h19434 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6M1AD.h19618 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6E2BB.h21081 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6M4AF.h21295 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA4L1BD.h23566 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6M2AF.h22602 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6M3AH.h26237 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA6M5BH.h25105 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA8T1AH.h25672 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA8M1AH.h27660 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro
DR7FA8D1BH.h36214 …#define R_SCI0_SPMR_CTSE_Pos (1UL) /*!< CTSE (Bit 1) … macro