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Searched refs:R_GPT0 (Results 1 – 24 of 24) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_gpt/
Dr_gpt.c849 uint32_t wp = R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
850 R_GPT0->GTWP = GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
851 R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
860 R_GPT0->GTWP = wp | GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
895 wp = R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
896 R_GPT0->GTWP = GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
897 R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
906 R_GPT0->GTWP = wp | GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
1089 R_GPT0->GTWP = GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelayInitialize()
1090 R_GPT0->GTWP; in R_GPT_PwmOutputDelayInitialize()
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/r_gpt/
Dr_gpt.c913 uint32_t wp = R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
914 R_GPT0->GTWP = GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
915 R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
924 R_GPT0->GTWP = wp | GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
959 wp = R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
960 R_GPT0->GTWP = GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
961 R_GPT0->GTWP; in R_GPT_PwmOutputDelaySet()
970 R_GPT0->GTWP = wp | GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelaySet()
1147 R_GPT0->GTWP = GPT_PRV_GTWP_RESET_VALUE; in R_GPT_PwmOutputDelayInitialize()
1148 R_GPT0->GTWP; in R_GPT_PwmOutputDelayInitialize()
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/cmsis/Device/RENESAS/Include/R9A08G045S/iodefines/
Dgpt_iodefine.h658 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/mcu/all/
Dbsp_module_stop.h122 … channel) ? R_GPT0->GTSTR : ((13 >= \
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h12363 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA2A1AB.h13712 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4E10D.h13576 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4W1AD.h13687 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4M1AB.h13852 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4M2AD.h14575 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4M3AF.h14679 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4E2B9.h15900 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6E10F.h15061 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6M1AD.h15390 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6E2BB.h16105 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6M4AF.h16760 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA4L1BD.h17434 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6M2AF.h17378 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6M3AH.h20049 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA6M5BH.h19377 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA8T1AH.h20241 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA8M1AH.h22213 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
DR7FA8D1BH.h30064 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h30896 #define R_GPT0 ((R_GPT0_Type *) R_GPT0_BASE) macro