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Searched refs:R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (Results 1 – 10 of 10) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/cmsis/Device/RENESAS/Include/R9A08G045S/iobitmasks/
Dcanfd_iobitmask.h226 #define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_canfd/
Dr_canfd.c358 *gaflp0_base |= (p_cfg->channel & 1U) << R_CANFD_CFDGAFL_P0_GAFLPTR_Pos; in R_CANFD_Open()
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA4E2B9.h16540 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
DR7FA6E2BB.h16746 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
DR7FA4L1BD.h18079 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
DR7FA6M5BH.h20049 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
DR7FA8T1AH.h20894 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
DR7FA8M1AH.h22869 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
DR7FA8D1BH.h30722 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h31162 …#define R_CANFD_CFDGAFL_P0_GAFLPTR_Pos (16UL) /*!< GAFLPTR (Bit 16) … macro