Home
last modified time | relevance | path

Searched refs:R_ADC0_ADCSR_DBLE_Msk (Results 1 – 20 of 20) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/src/r_adc/
Dr_adc.c1103 adcsr |= R_ADC0_ADCSR_DBLE_Msk; in r_adc_open_sub()
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h13263 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA2A1AB.h14680 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4E10D.h14415 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4W1AD.h14621 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4M1AB.h14787 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4M2AD.h15420 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4M3AF.h15525 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4E2B9.h17071 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6E10F.h15904 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6M1AD.h16311 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6E2BB.h17277 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6M4AF.h17621 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA4L1BD.h18672 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6M2AF.h18302 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6M3AH.h21326 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA6M5BH.h20591 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA8T1AH.h21564 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA8M1AH.h23552 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro
DR7FA8D1BH.h31731 …#define R_ADC0_ADCSR_DBLE_Msk (0x80UL) /*!< DBLE (Bitfield-Mask: 0x01) … macro