Searched refs:QSPIC_CTRLMODE_REG (Results 1 – 2 of 2) sorted by relevance
84 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in qspi_write()98 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in qspi_transact()116 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_set_bus_mode()123 qspi_id->QSPIC_CTRLMODE_REG |= (QSPIC_QSPIC_CTRLMODE_REG_QSPIC_IO2_OEN_Msk | in da1469x_qspi_set_bus_mode()129 qspi_id->QSPIC_CTRLMODE_REG &= ~(QSPIC_QSPIC_CTRLMODE_REG_QSPIC_IO2_OEN_Msk | in da1469x_qspi_set_bus_mode()138 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_memory_jedec_reset()163 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_memory_jedec_read_id()177 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_enter_exit_qpi_mode()186 uint32_t qspic_ctrlmode_reg = qspi_id->QSPIC_CTRLMODE_REG; in da1469x_qspi_set_read_pipe_delay()189 qspi_id->QSPIC_CTRLMODE_REG = qspic_ctrlmode_reg; in da1469x_qspi_set_read_pipe_delay()
1083 …__IOM uint32_t QSPIC_CTRLMODE_REG; /*!< (@ 0x00000004) Mode Control register … member
