Home
last modified time | relevance | path

Searched refs:PLL_SYS_STATUS_REG (Results 1 – 3 of 3) sorted by relevance

/hal_renesas-latest/smartbond/da1469x_hal/
Dda1469x_clock.h177 return 0 != (CRG_XTAL->PLL_SYS_STATUS_REG & CRG_XTAL_PLL_SYS_STATUS_REG_PLL_LOCK_FINE_Msk); in da1469x_clock_is_pll_locked()
Dda1469x_clock.c567 if ((CRG_XTAL->PLL_SYS_STATUS_REG & CRG_XTAL_PLL_SYS_STATUS_REG_LDO_PLL_OK_Msk) == 0) { in da1469x_clock_sys_pll_enable()
572 if ((CRG_XTAL->PLL_SYS_STATUS_REG & CRG_XTAL_PLL_SYS_STATUS_REG_PLL_LOCK_FINE_Msk) == 0) { in da1469x_clock_sys_pll_enable()
/hal_renesas-latest/smartbond/sdk/bsp/include/
DDA1469xAB.h501 …__IOM uint32_t PLL_SYS_STATUS_REG; /*!< (@ 0x00000070) System PLL status register. … member