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Searched refs:MEMCTRL (Results 1 – 3 of 3) sorted by relevance

/hal_renesas-latest/smartbond/cmac/
Dshm.c64 MEMCTRL->CMI_CODE_BASE_REG))
68 MEMCTRL->CMI_SHARED_BASE_REG))
180 MEMCTRL->CMI_CODE_BASE_REG = (uint32_t)&_binary_cmac_ram_bin_start; in cmac_load_image()
181 MEMCTRL->CMI_DATA_BASE_REG = MEMCTRL->CMI_CODE_BASE_REG + ii->data_offset; in cmac_load_image()
182 MEMCTRL->CMI_SHARED_BASE_REG = MEMCTRL->CMI_CODE_BASE_REG + ii->shared_offset; in cmac_load_image()
183 MEMCTRL->CMI_END_REG = MEMCTRL->CMI_CODE_BASE_REG + ii->ram_size - 1; in cmac_load_image()
Dshm.h150 while ((MEMCTRL->BUSY_STAT_REG & MEMCTRL_BUSY_RESET_REG_BUSY_SPARE_Msk) != 0x40000000) { in cmac_shm_lock()
151 MEMCTRL->BUSY_SET_REG = 0x40000000; in cmac_shm_lock()
158 MEMCTRL->BUSY_RESET_REG = 0x40000000; in cmac_shm_unlock()
/hal_renesas-latest/smartbond/sdk/bsp/include/
DDA1469xAB.h1851 #define MEMCTRL ((MEMCTRL_Type*) MEMCTRL_BASE) macro