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Searched refs:DVRDLO0 (Results 1 – 2 of 2) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA6M4AF.h15361 …__IOM uint32_t DVRDLO0 : 2; /*!< [15..14] Device 0 select signal pull-down timing setting … member
DR7FA6M5BH.h17977 …__IOM uint32_t DVRDLO0 : 2; /*!< [15..14] Device 0 select signal pull-down timing setting … member