Searched refs:DSSEICR (Results 1 – 2 of 2) sorted by relevance
181 …e BSP_MSTP_DMY_FSP_IP_DSMIF(channel) (0 >= channel) ? R_DSMIF0->DSSEICR : R_DSMIF1->DSSEICR185 #define BSP_MSTP_DMY_FSP_IP_DSMIF(channel) (0 >= channel) ? R_DSMIF0->DSSEICR : \186 ((1 >= channel) ? R_DSMIF1->DSSEICR : \187 ((2 >= channel) ? R_DSMIF2->DSSEICR : \188 ((3 >= channel) ? R_DSMIF3->DSSEICR : \189 ((4 >= channel) ? R_DSMIF4->DSSEICR : \190 ((5 >= channel) ? R_DSMIF5->DSSEICR : \191 ((6 >= channel) ? R_DSMIF6->DSSEICR : \192 ((7 >= channel) ? R_DSMIF7->DSSEICR : \193 ((8 >= channel) ? R_DSMIF8->DSSEICR : \[all …]
30411 … __IOM uint32_t DSSEICR; /*!< (@ 0x00000040) Overcurrent Sum Error Detect Interrupt Control member
