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Searched refs:DIVSELXSPI1 (Results 1 – 2 of 2) sorted by relevance

/hal_renesas-latest/zephyr/rz/portable/rzn/
Dbsp_common.h669 … clock_hz = g_bsp_system_clock_select_xspi_clk[fselxspi1][R_SYSC_NS->SCKCR_b.DIVSELXSPI1]; in R_FSP_SystemClockHzGet()
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h25760 … __IOM uint32_t DIVSELXSPI1 : 1; /*!< [14..14] Select the base clock to generate serial clock for member