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Searched refs:CPG_BUS_MCPU1_MSTOP (Results 1 – 3 of 3) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/all/
Dbsp_module_stop.h52 #define BSP_MSTP_REG_FSP_IP_GPT(channel) R_CPG->CPG_BUS_MCPU1_MSTOP
55 #define BSP_MSTP_REG_FSP_IP_POEG(channel) R_CPG->CPG_BUS_MCPU1_MSTOP
76 … channel) ? &R_CPG->CPG_BUS_MCPU1_MSTOP : &R_CPG->CPG_BUS_MCPU2_MSTOP)
94 #define BSP_MSTP_REG_FSP_IP_SSI(channel) R_CPG->CPG_BUS_MCPU1_MSTOP
113 #define BSP_MSTP_REG_FSP_IP_MTU3(channel) R_CPG->CPG_BUS_MCPU1_MSTOP
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/rzg3s/
Dbsp_override.h252 #define BSP_MSTP_REG_FSP_IP_XSPI(channel) R_CPG->CPG_BUS_MCPU1_MSTOP
255 #define BSP_MSTP_REG_FSP_IP_RSPI(channel) *((1U >= channel) ? &R_CPG->CPG_BUS_MCPU1_MSTOP \
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/cmsis/Device/RENESAS/Include/R9A08G045S/iodefines/
Dcpg_iodefine.h3333 __IOM uint32_t CPG_BUS_MCPU1_MSTOP; member