Searched refs:CLK_CTRL_REG (Results 1 – 3 of 3) sorted by relevance
180 ret |= !((CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_XTAL32M_Msk) || in da1469x_clock_sys_pll_switch_check_restrictions()181 (CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_PLL96M_Msk)); in da1469x_clock_sys_pll_switch_check_restrictions()298 if (CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_RC32M_Msk) { in da1469x_clock_sys_xtal32m_switch()303 CRG_TOP->CLK_CTRL_REG &= ~CRG_TOP_CLK_CTRL_REG_SYS_CLK_SEL_Msk; in da1469x_clock_sys_xtal32m_switch()306 while (!(CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_XTAL32M_Msk)); in da1469x_clock_sys_xtal32m_switch()361 CRG_TOP->CLK_CTRL_REG = (CRG_TOP->CLK_CTRL_REG & in da1469x_clock_lp_xtal32k_switch()375 CRG_TOP->CLK_CTRL_REG = (CRG_TOP->CLK_CTRL_REG & in da1469x_clock_lp_rcx_switch()651 CRG_TOP->CLK_CTRL_REG |= CRG_TOP_CLK_CTRL_REG_SYS_CLK_SEL_Msk; in da1469x_clock_sys_pll_switch()653 while (!(CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_PLL96M_Msk)); in da1469x_clock_sys_pll_switch()
52 return (CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_LP_CLK_SEL_Msk) && in da1469x_is_sleep_allowed()73 sys_clock_selection = CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_SYS_CLK_SEL_Msk; in da1469x_sleep()
421 …__IOM uint32_t CLK_CTRL_REG; /*!< (@ 0x00000014) Clock control register … member
