Searched refs:CLK_AMBA_REG (Results 1 – 5 of 5) sorted by relevance
138 CRG_TOP->CLK_AMBA_REG |= mask; in da1469x_clock_amba_enable()153 CRG_TOP->CLK_AMBA_REG &= ~mask; in da1469x_clock_amba_disable()
54 .equ CLK_AMBA_REG, 0x50000000 define140 ldr r0, =CLK_AMBA_REG163 ldr r2, =CLK_AMBA_REG234 ldr r0, =CLK_AMBA_REG
42 CRG_TOP->CLK_AMBA_REG |= mask; in da1469x_clock_amba_enable()52 CRG_TOP->CLK_AMBA_REG &= ~mask; in da1469x_clock_amba_disable()
154 uint8_t hclk_div = (CRG_TOP->CLK_AMBA_REG & CRG_TOP_CLK_AMBA_REG_HCLK_DIV_Msk); in da1469x_clock_adjust_otp_access_timings()175 ret |= !((CRG_TOP->CLK_AMBA_REG & CRG_TOP_CLK_AMBA_REG_HCLK_DIV_Msk) == 0 && in da1469x_clock_sys_pll_switch_check_restrictions()176 (CRG_TOP->CLK_AMBA_REG & CRG_TOP_CLK_AMBA_REG_PCLK_DIV_Msk) == 0); in da1469x_clock_sys_pll_switch_check_restrictions()
418 …__IOM uint32_t CLK_AMBA_REG; /*!< (@ 0x00000000) HCLK, PCLK, divider and clock ga… member
