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Searched refs:CHITVL (Results 1 – 3 of 3) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/cmsis/Device/RENESAS/Include/R9A08G045S/iodefines/
Ddmac_b_iodefine.h118 __IOM uint32_t CHITVL; member
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_dmac_b/
Dr_dmac_b.c676 p_ctrl->p_reg->GRP[group].CH[channel].CHITVL = p_extend->transfer_interval; in r_dmac_b_config_transfer_info()
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h909 …__IOM uint32_t CHITVL; /*!< (@ 0x00000030) Channel Interval Register n (n = 0 to 7) … member
1630 …__IOM uint32_t CHITVL; /*!< (@ 0x00000030) Channel Interval Register … member