Searched refs:BSP_PRV_PLLCCR2_PLL_DIV_MASK (Results 1 – 1 of 1) sorted by relevance
283 …#define BSP_PRV_PLLCCR2_PLL_DIV_MASK (0x0F) // PLL DIV in PLLCCR2/PLL2CCR2 is 4 bits w… macro286 …ne BSP_PRV_PLLCCR2 (((BSP_CFG_PLODIVR & BSP_PRV_PLLCCR2_PLL_DIV_MASK) << \288 … ((BSP_CFG_PLODIVQ & BSP_PRV_PLLCCR2_PLL_DIV_MASK) << \290 … (BSP_CFG_PLODIVP & BSP_PRV_PLLCCR2_PLL_DIV_MASK))
