Searched refs:BSP_PRV_GIC_REG_STRIDE32 (Results 1 – 1 of 1) sorted by relevance
49 #define BSP_PRV_GIC_REG_STRIDE32 (32U) macro107 GICD->GICD_ICPENDR[_irq / BSP_PRV_GIC_REG_STRIDE32] = in r_bsp_irq_clear_pending()108 (uint32_t) (BSP_PRV_GIC_REG_BITS1 << (_irq % BSP_PRV_GIC_REG_STRIDE32)); in r_bsp_irq_clear_pending()137 uint32_t shift = (_irq % BSP_PRV_GIC_REG_STRIDE32); in r_bsp_irq_pending_get()138 …value = (GICD->GICD_ISPENDR[_irq / BSP_PRV_GIC_REG_STRIDE32] >> shift) & (uint32_t) (BSP_PRV_GIC_R… in r_bsp_irq_pending_get()170 GICD->GICD_IGROUPR[_irq / BSP_PRV_GIC_REG_STRIDE32] |= in r_bsp_irq_cfg()171 (uint32_t) (BSP_PRV_GIC_REG_BITS1 << (_irq % BSP_PRV_GIC_REG_STRIDE32)); in r_bsp_irq_cfg()214 GICD->GICD_ISENABLER[_irq / BSP_PRV_GIC_REG_STRIDE32] |= in r_bsp_irq_enable_no_clear()215 (uint32_t) (BSP_PRV_GIC_REG_BITS1 << (_irq % BSP_PRV_GIC_REG_STRIDE32)); in r_bsp_irq_enable_no_clear()241 GICD->GICD_ICENABLER[_irq / BSP_PRV_GIC_REG_STRIDE32] = in r_bsp_irq_disable()[all …]
