BSP_CFG_DIVSDHI2_SET_DIV (reference) in projects: hal_renesas-latest

Searched refs:BSP_CFG_DIVSDHI2_SET_DIV (Results 1 – 2 of 2) sorted by relevance

/hal_renesas-latest/zephyr/rz/rz_cfg/fsp_cfg/bsp/rzg3s/
D	bsp_clock_cfg.h	`30 #define BSP_CFG_DIVSDHI2_SET_DIV (BSP_CLOCKS_SDHI2_DIV_2) … macro`
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/all/
D	bsp_clocks.c	`226 (BSP_CFG_DIVSDHI2_SET_DIV << R_CPG_CPG_SDHI_DDIV_DIVSDHI2_SET_Pos)); in bsp_clock_freq_init_cfg()`