Searched refs:BSP_CFG_DIVPL1_SET_DIV (Results 1 – 2 of 2) sorted by relevance
15 #define BSP_CFG_DIVPL1_SET_DIV (BSP_CLOCKS_PL1_DIV_1) … macro
177 setting_value = (uint32_t) (BSP_CFG_DIVPL1_SET_DIV << R_CPG_CPG_PL1_DDIV_DIVPL1_SET_Pos); in bsp_clock_freq_init_cfg()694 #if defined(BSP_CFG_DIVPL1_SET_DIV) in bsp_prv_clock_divider_set()