1 /*
2  * ==========================================================
3  *
4  *    Copyright (C) 2020 QuickLogic Corporation
5  *    Licensed under the Apache License, Version 2.0 (the "License");
6  *    you may not use this file except in compliance with the License.
7  *    You may obtain a copy of the License at
8  * 		http://www.apache.org/licenses/LICENSE-2.0
9  *    Unless required by applicable law or agreed to in writing, software
10  *    distributed under the License is distributed on an "AS IS" BASIS,
11  *    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  *    See the License for the specific language governing permissions and
13  *    limitations under the License.
14  *
15  *    File      : eoss3_hal_gpio.h
16  *    Purpose   : This file contains macros, structures and APIs to
17  *             read/write GPIO
18  *
19  *
20  * ===========================================================
21  *
22  */
23 
24 #ifndef __EOSS3_HAL_GPIO_H
25 #define __EOSS3_HAL_GPIO_H
26 
27 #include "eoss3_dev.h"
28 #include "eoss3_hal_pad_config.h"
29 
30 #include "eoss3_hal_def.h"
31 
32 #ifdef __cplusplus
33  extern "C" {
34 #endif
35 
36 /*! \def GPIO_0
37     \brief GPIO index 0.
38 */
39 #define GPIO_0	0
40 
41 /*! \def GPIO_1
42     \brief GPIO index 1.
43 */
44 #define GPIO_1	1
45 
46 /*! \def GPIO_2
47     \brief GPIO index 3.
48 */
49 #define GPIO_2	2
50 
51 /*! \def GPIO_3
52     \brief GPIO index 3.
53 */
54 #define GPIO_3	3
55 
56 /*! \def GPIO_4
57     \brief GPIO index 4.
58 */
59 #define GPIO_4	4
60 
61 /*! \def GPIO_5
62     \brief GPIO index 5.
63 */
64 #define GPIO_5	5
65 
66 /*! \def GPIO_6
67     \brief GPIO index 6.
68 */
69 #define GPIO_6	6
70 
71 /*! \def GPIO_7
72     \brief GPIO index 7.
73 */
74 #define GPIO_7	7
75 
76 #define PAD_COUNT	46
77 
78 #define S_INTR_SEL_BASE		((volatile uint32_t *)0x40004D3C)
79 
80 typedef enum
81 {
82 	LEVEL_TRIGGERED = 0,
83 	EDGE_TRIGGERED = 1
84 }GPIO_INTR_TYPE;
85 
86 typedef enum
87 {
88 	FALL_LOW = 0,
89 	RISE_HIGH = 1
90 }GPIO_POL_TYPE;
91 
92 /*!
93  * \brief GPIO Configuration Structure definition
94  */
95 typedef struct __GPIOCfgTypeDef
96 {
97 	UINT8_t   ucGpioNum;
98 	PadConfig *xPadConf;
99 	GPIO_INTR_TYPE	intr_type;
100 	GPIO_POL_TYPE	pol_type;
101 
102 }GPIOCfgTypeDef;
103 
104 
105 /*! \fn HAL_GPIO_Read(uint8_t ucGpioIndex, uint8_t *ucGpioVal)
106     \brief GPIO read function to read pad status. Before using this function
107       given pad needs to be initalized.
108     \param ucGpioIndex - GPIO index that needs to be read.
109     \param *ucGpioVal - GPIO status read, return value pointer.
110     \return None
111 */
112 void HAL_GPIO_Read(uint8_t ucGpioIndex, uint8_t *ucGpioVal);
113 
114 
115  /*! \fn HAL_GPIO_Write(uint8_t ucGpioIndex, uint8_t ucGpioVal)
116     \brief GPIO write function to write to pad . Before using this function
117       given pad needs to be initalized.
118     \param ucGpioIndex - GPIO index that needs to be written.
119     \param ucGpioVal - GPIO status that needs to be written.
120     \return None
121 */
122 void HAL_GPIO_Write(uint8_t ucGpioIndex, uint8_t ucGpioVal);
123 
124  /*! \fn HAL_StatusTypeDef  HAL_GPIO_IntrCfg(GPIOCfgTypeDef *hGpioCfg)
125     \brief Function to write to configure pad as GPIO interrupt in INTR_CTRL and IO_MUX.
126     \param hGpioCfg - pointer to GPIO configuration structure.
127     \return gpio IRQ number
128 */
129 int HAL_GPIO_IntrCfg(GPIOCfgTypeDef *hGpioCfg);
130 
131 #ifdef __cplusplus
132 }
133 #endif
134 
135 #endif /* __EOSS3_HAL_PADS_H */
136