S_INTR_5_SEL_REG (reference) in projects: hal_quicklogic-3.7.0

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Searched refs:S_INTR_5_SEL_REG (Results 1 – 2 of 2) sorted by relevance

/hal_quicklogic-3.7.0/HAL/src/
D	eoss3_hal_gpio.c	`83 IO_MUX->S_INTR_5_SEL_REG = 1; in HAL_GPIO_IntrCfg() 87 IO_MUX->S_INTR_5_SEL_REG = 2; in HAL_GPIO_IntrCfg() 119 IO_MUX->S_INTR_5_SEL_REG = 4; in HAL_GPIO_IntrCfg() 135 IO_MUX->S_INTR_5_SEL_REG = 5; in HAL_GPIO_IntrCfg()`
/hal_quicklogic-3.7.0/HAL/inc/
D	eoss3_dev.h	`476 __IO uint32_t S_INTR_5_SEL_REG; /* Address offset: 0x150 */ member`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
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