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Searched refs:S_INTR_2_SEL_REG (Results 1 – 2 of 2) sorted by relevance

/hal_quicklogic-3.7.0/HAL/src/
Deoss3_hal_gpio.c95 IO_MUX->S_INTR_2_SEL_REG = 3; in HAL_GPIO_IntrCfg()
131 IO_MUX->S_INTR_2_SEL_REG = 6; in HAL_GPIO_IntrCfg()
/hal_quicklogic-3.7.0/HAL/inc/
Deoss3_dev.h473 __IO uint32_t S_INTR_2_SEL_REG; /* Address offset: 0x144 */ member