1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_GPIO_H_
10 #define _FSL_GPIO_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup gpio
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*@{*/
25 /*! @brief GPIO driver version 2.2.0. */
26 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
27 /*@}*/
28
29 /*! @brief GPIO direction definition */
30 typedef enum _gpio_pin_direction
31 {
32 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
33 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
34 } gpio_pin_direction_t;
35
36 #if defined(FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER) && FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER
37 /*! @brief GPIO checker attribute */
38 typedef enum _gpio_checker_attribute
39 {
40 kGPIO_UsernonsecureRWUsersecureRWPrivilegedsecureRW =
41 0x00U, /*!< User nonsecure:Read+Write; User Secure:Read+Write; Privileged Secure:Read+Write */
42 kGPIO_UsernonsecureRUsersecureRWPrivilegedsecureRW =
43 0x01U, /*!< User nonsecure:Read; User Secure:Read+Write; Privileged Secure:Read+Write */
44 kGPIO_UsernonsecureNUsersecureRWPrivilegedsecureRW =
45 0x02U, /*!< User nonsecure:None; User Secure:Read+Write; Privileged Secure:Read+Write */
46 kGPIO_UsernonsecureRUsersecureRPrivilegedsecureRW =
47 0x03U, /*!< User nonsecure:Read; User Secure:Read; Privileged Secure:Read+Write */
48 kGPIO_UsernonsecureNUsersecureRPrivilegedsecureRW =
49 0x04U, /*!< User nonsecure:None; User Secure:Read; Privileged Secure:Read+Write */
50 kGPIO_UsernonsecureNUsersecureNPrivilegedsecureRW =
51 0x05U, /*!< User nonsecure:None; User Secure:None; Privileged Secure:Read+Write */
52 kGPIO_UsernonsecureNUsersecureNPrivilegedsecureR =
53 0x06U, /*!< User nonsecure:None; User Secure:None; Privileged Secure:Read */
54 kGPIO_UsernonsecureNUsersecureNPrivilegedsecureN =
55 0x07U, /*!< User nonsecure:None; User Secure:None; Privileged Secure:None */
56 kGPIO_IgnoreAttributeCheck = 0x80U, /*!< Ignores the attribute check */
57 } gpio_checker_attribute_t;
58 #endif
59
60 /*!
61 * @brief The GPIO pin configuration structure.
62 *
63 * Each pin can only be configured as either an output pin or an input pin at a time.
64 * If configured as an input pin, leave the outputConfig unused.
65 * Note that in some use cases, the corresponding port property should be configured in advance
66 * with the PORT_SetPinConfig().
67 */
68 typedef struct z_gpio_pin_config
69 {
70 gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */
71 /* Output configurations; ignore if configured as an input pin */
72 uint8_t outputLogic; /*!< Set a default output logic, which has no use in input */
73 } gpio_pin_config_t;
74
75 /*! @} */
76
77 /*******************************************************************************
78 * API
79 ******************************************************************************/
80
81 #if defined(__cplusplus)
82 extern "C" {
83 #endif
84
85 /*!
86 * @addtogroup gpio_driver
87 * @{
88 */
89
90 /*! @name GPIO Configuration */
91 /*@{*/
92
93 /*!
94 * @brief Initializes a GPIO pin used by the board.
95 *
96 * To initialize the GPIO, define a pin configuration, as either input or output, in the user file.
97 * Then, call the GPIO_PinInit() function.
98 *
99 * This is an example to define an input pin or an output pin configuration.
100 * @code
101 * // Define a digital input pin configuration,
102 * gpio_pin_config_t config =
103 * {
104 * kGPIO_DigitalInput,
105 * 0,
106 * }
107 * //Define a digital output pin configuration,
108 * gpio_pin_config_t config =
109 * {
110 * kGPIO_DigitalOutput,
111 * 0,
112 * }
113 * @endcode
114 *
115 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
116 * @param pin GPIO port pin number
117 * @param config GPIO pin configuration pointer
118 */
119 void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
120
121 /*@}*/
122
123 /*! @name GPIO Output Operations */
124 /*@{*/
125
126 /*!
127 * @brief Sets the output level of the multiple GPIO pins to the logic 1 or 0.
128 *
129 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
130 * @param pin GPIO pin number
131 * @param output GPIO pin output logic level.
132 * - 0: corresponding pin output low-logic level.
133 * - 1: corresponding pin output high-logic level.
134 */
GPIO_WritePinOutput(GPIO_Type * base,uint32_t pin,uint8_t output)135 static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
136 {
137 if (output == 0U)
138 {
139 base->PCOR = 1U << pin;
140 }
141 else
142 {
143 base->PSOR = 1U << pin;
144 }
145 }
146
147 /*!
148 * @brief Sets the output level of the multiple GPIO pins to the logic 1.
149 *
150 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
151 * @param mask GPIO pin number macro
152 */
GPIO_SetPinsOutput(GPIO_Type * base,uint32_t mask)153 static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
154 {
155 base->PSOR = mask;
156 }
157
158 /*!
159 * @brief Sets the output level of the multiple GPIO pins to the logic 0.
160 *
161 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
162 * @param mask GPIO pin number macro
163 */
GPIO_ClearPinsOutput(GPIO_Type * base,uint32_t mask)164 static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
165 {
166 base->PCOR = mask;
167 }
168
169 /*!
170 * @brief Reverses the current output logic of the multiple GPIO pins.
171 *
172 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
173 * @param mask GPIO pin number macro
174 */
GPIO_TogglePinsOutput(GPIO_Type * base,uint32_t mask)175 static inline void GPIO_TogglePinsOutput(GPIO_Type *base, uint32_t mask)
176 {
177 base->PTOR = mask;
178 }
179 /*@}*/
180
181 /*! @name GPIO Input Operations */
182 /*@{*/
183
184 /*!
185 * @brief Reads the current input value of the GPIO port.
186 *
187 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
188 * @param pin GPIO pin number
189 * @retval GPIO port input value
190 * - 0: corresponding pin input low-logic level.
191 * - 1: corresponding pin input high-logic level.
192 */
GPIO_ReadPinInput(GPIO_Type * base,uint32_t pin)193 static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
194 {
195 return (((base->PDIR) >> pin) & 0x01U);
196 }
197 /*@}*/
198
199 /*! @name GPIO Interrupt */
200 /*@{*/
201
202 /*!
203 * @brief Reads the GPIO port interrupt status flag.
204 *
205 * If a pin is configured to generate the DMA request, the corresponding flag
206 * is cleared automatically at the completion of the requested DMA transfer.
207 * Otherwise, the flag remains set until a logic one is written to that flag.
208 * If configured for a level sensitive interrupt that remains asserted, the flag
209 * is set again immediately.
210 *
211 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
212 * @retval The current GPIO port interrupt status flag, for example, 0x00010001 means the
213 * pin 0 and 17 have the interrupt.
214 */
215 uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base);
216
217 /*!
218 * @brief Clears multiple GPIO pin interrupt status flags.
219 *
220 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
221 * @param mask GPIO pin number macro
222 */
223 void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask);
224
225 #if defined(FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER) && FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER
226 /*!
227 * @brief The GPIO module supports a device-specific number of data ports, organized as 32-bit
228 * words. Each 32-bit data port includes a GACR register, which defines the byte-level
229 * attributes required for a successful access to the GPIO programming model. The attribute controls for the 4 data
230 * bytes in the GACR follow a standard little endian
231 * data convention.
232 *
233 * @param base GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
234 * @param mask GPIO pin number macro
235 */
236 void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute);
237 #endif
238
239 /*@}*/
240 /*! @} */
241
242 /*!
243 * @addtogroup fgpio_driver
244 * @{
245 */
246
247 /*
248 * Introduces the FGPIO feature.
249 *
250 * The FGPIO features are only support on some Kinetis MCUs. The FGPIO registers are aliased to the IOPORT
251 * interface. Accesses via the IOPORT interface occur in parallel with any instruction fetches and
252 * complete in a single cycle. This aliased Fast GPIO memory map is called FGPIO.
253 */
254
255 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
256
257 /*! @name FGPIO Configuration */
258 /*@{*/
259
260 /*!
261 * @brief Initializes the FGPIO peripheral.
262 *
263 * This function ungates the FGPIO clock.
264 *
265 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
266 */
267 void FGPIO_Init(FGPIO_Type *base);
268
269 /*!
270 * @brief Initializes a FGPIO pin used by the board.
271 *
272 * To initialize the FGPIO driver, define a pin configuration, as either input or output, in the user file.
273 * Then, call the FGPIO_PinInit() function.
274 *
275 * This is an example to define an input pin or an output pin configuration:
276 * @code
277 * // Define a digital input pin configuration,
278 * gpio_pin_config_t config =
279 * {
280 * kGPIO_DigitalInput,
281 * 0,
282 * }
283 * //Define a digital output pin configuration,
284 * gpio_pin_config_t config =
285 * {
286 * kGPIO_DigitalOutput,
287 * 0,
288 * }
289 * @endcode
290 *
291 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
292 * @param pin FGPIO port pin number
293 * @param config FGPIO pin configuration pointer
294 */
295 void FGPIO_PinInit(FGPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
296
297 /*@}*/
298
299 /*! @name FGPIO Output Operations */
300 /*@{*/
301
302 /*!
303 * @brief Sets the output level of the multiple FGPIO pins to the logic 1 or 0.
304 *
305 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
306 * @param pin FGPIO pin number
307 * @param output FGPIOpin output logic level.
308 * - 0: corresponding pin output low-logic level.
309 * - 1: corresponding pin output high-logic level.
310 */
FGPIO_WritePinOutput(FGPIO_Type * base,uint32_t pin,uint8_t output)311 static inline void FGPIO_WritePinOutput(FGPIO_Type *base, uint32_t pin, uint8_t output)
312 {
313 if (output == 0U)
314 {
315 base->PCOR = 1 << pin;
316 }
317 else
318 {
319 base->PSOR = 1 << pin;
320 }
321 }
322
323 /*!
324 * @brief Sets the output level of the multiple FGPIO pins to the logic 1.
325 *
326 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
327 * @param mask FGPIO pin number macro
328 */
FGPIO_SetPinsOutput(FGPIO_Type * base,uint32_t mask)329 static inline void FGPIO_SetPinsOutput(FGPIO_Type *base, uint32_t mask)
330 {
331 base->PSOR = mask;
332 }
333
334 /*!
335 * @brief Sets the output level of the multiple FGPIO pins to the logic 0.
336 *
337 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
338 * @param mask FGPIO pin number macro
339 */
FGPIO_ClearPinsOutput(FGPIO_Type * base,uint32_t mask)340 static inline void FGPIO_ClearPinsOutput(FGPIO_Type *base, uint32_t mask)
341 {
342 base->PCOR = mask;
343 }
344
345 /*!
346 * @brief Reverses the current output logic of the multiple FGPIO pins.
347 *
348 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
349 * @param mask FGPIO pin number macro
350 */
FGPIO_TogglePinsOutput(FGPIO_Type * base,uint32_t mask)351 static inline void FGPIO_TogglePinsOutput(FGPIO_Type *base, uint32_t mask)
352 {
353 base->PTOR = mask;
354 }
355 /*@}*/
356
357 /*! @name FGPIO Input Operations */
358 /*@{*/
359
360 /*!
361 * @brief Reads the current input value of the FGPIO port.
362 *
363 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
364 * @param pin FGPIO pin number
365 * @retval FGPIO port input value
366 * - 0: corresponding pin input low-logic level.
367 * - 1: corresponding pin input high-logic level.
368 */
FGPIO_ReadPinInput(FGPIO_Type * base,uint32_t pin)369 static inline uint32_t FGPIO_ReadPinInput(FGPIO_Type *base, uint32_t pin)
370 {
371 return (((base->PDIR) >> pin) & 0x01U);
372 }
373 /*@}*/
374
375 /*! @name FGPIO Interrupt */
376 /*@{*/
377
378 /*!
379 * @brief Reads the FGPIO port interrupt status flag.
380 *
381 * If a pin is configured to generate the DMA request, the corresponding flag
382 * is cleared automatically at the completion of the requested DMA transfer.
383 * Otherwise, the flag remains set until a logic one is written to that flag.
384 * If configured for a level-sensitive interrupt that remains asserted, the flag
385 * is set again immediately.
386 *
387 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
388 * @retval The current FGPIO port interrupt status flags, for example, 0x00010001 means the
389 * pin 0 and 17 have the interrupt.
390 */
391 uint32_t FGPIO_GetPinsInterruptFlags(FGPIO_Type *base);
392
393 /*!
394 * @brief Clears the multiple FGPIO pin interrupt status flag.
395 *
396 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
397 * @param mask FGPIO pin number macro
398 */
399 void FGPIO_ClearPinsInterruptFlags(FGPIO_Type *base, uint32_t mask);
400
401 #if defined(FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER) && FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER
402 /*!
403 * @brief The FGPIO module supports a device-specific number of data ports, organized as 32-bit
404 * words. Each 32-bit data port includes a GACR register, which defines the byte-level
405 * attributes required for a successful access to the GPIO programming model. The attribute controls for the 4 data
406 * bytes in the GACR follow a standard little endian
407 * data convention.
408 *
409 * @param base FGPIO peripheral base pointer (FGPIOA, FGPIOB, FGPIOC, and so on.)
410 * @param mask FGPIO pin number macro
411 */
412 void FGPIO_CheckAttributeBytes(FGPIO_Type *base, gpio_checker_attribute_t attribute);
413 #endif
414
415 /*@}*/
416
417 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */
418
419 #if defined(__cplusplus)
420 }
421 #endif
422
423 /*!
424 * @}
425 */
426
427 #endif /* _FSL_GPIO_H_*/
428
