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Searched refs:scg_async_clk_div_t (Results 1 – 1 of 1) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.h509 } scg_async_clk_div_t; typedef
539 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */
540 scg_async_clk_div_t div2; /*!< SOSCDIV2 value. */
541 scg_async_clk_div_t div3; /*!< SOSCDIV3 value. */
568 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */
569 scg_async_clk_div_t div2; /*!< SIRCDIV2 value. */
570 scg_async_clk_div_t div3; /*!< SIRCDIV3 value. */
653 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */
654 scg_async_clk_div_t div2; /*!< FIRCDIV2 value. */
655 scg_async_clk_div_t div3; /*!< FIRCDIV3 value. */
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