Home
last modified time | relevance | path

Searched refs:kFLEXIO_SPI_ClockPhaseFirstEdge (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_flexio_spi.c182 if (masterConfig->phase == kFLEXIO_SPI_ClockPhaseFirstEdge) in FLEXIO_SPI_MasterInit()
206 if (masterConfig->phase == kFLEXIO_SPI_ClockPhaseFirstEdge) in FLEXIO_SPI_MasterInit()
286 masterConfig->phase = kFLEXIO_SPI_ClockPhaseFirstEdge; in FLEXIO_SPI_MasterGetDefaultConfig()
329 if (slaveConfig->phase == kFLEXIO_SPI_ClockPhaseFirstEdge) in FLEXIO_SPI_SlaveInit()
351 if (slaveConfig->phase == kFLEXIO_SPI_ClockPhaseFirstEdge) in FLEXIO_SPI_SlaveInit()
375 if (slaveConfig->phase == kFLEXIO_SPI_ClockPhaseFirstEdge) in FLEXIO_SPI_SlaveInit()
407 slaveConfig->phase = kFLEXIO_SPI_ClockPhaseFirstEdge; in FLEXIO_SPI_SlaveGetDefaultConfig()
Dfsl_flexio_spi.h46 …kFLEXIO_SPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SPSCK occurs at the middle of the first enumerator