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Searched refs:enableMode (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.c344 tmp8 = config->enableMode; in CLOCK_InitSysOsc()
450 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
573 SCG->FIRCCSR |= (SCG_FIRCCSR_FIRCEN_MASK | SCG_FIRCCSR_FIRCTREN_MASK | config->enableMode); in CLOCK_InitFirc()
711 SCG->LPFLLCSR |= (SCG_LPFLLCSR_LPFLLEN_MASK | config->enableMode); in CLOCK_InitLpFll()
Dfsl_clock.h537 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
567 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
651 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
734 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member